Sigmastar Technology Ltd.

Wei-Ping Wang

Wei-Chih Cheng

Chang-Han Li

Hsiu-Hua Lin

Yu-Hung Kuo

Yen-Ping Liu

Chi-Yun Liu

A fail-safe input/output device includes an input/output circuit, a comparator circuit and a resistance adjustment circuit. The input/output circuit transmits a voltage having a higher voltage level in a first supply voltage and a second supply voltage to a first node to generate a driving voltage, wherein a first target level of the first supply voltage is lower than a second target level of the second supply voltage. The comparator circuit compares the first supply voltage with the second supply voltage to generate a control signal, and selectively transmits the first supply voltage to the first node according to the control signal. The resistance adjustment circuit adjusts a resistance between the first node and a second node according to the second supply voltage, wherein the input/output circuit transmits the second supply voltage to the first node via the second node.

Fail-safe input/output device and voltage switching method

A voltage detection device includes a voltage divider circuit, a comparator circuit and a switch control circuit. The voltage divider circuit operates in a first mode based on a switching signal and divides a power voltage to generate an input voltage. The comparator circuit compares the input voltage with a set of reference voltages to generate a detection signal. The switch control circuit selectively adjusts a switching signal according to the detection signal after a predetermined period has elapsed from power-on of the power voltage so as to control the voltage divider circuit to switch from operating in the first mode to operating in a second mode. The first mode corresponds to a first target level of the power voltage, the second mode corresponds to a second target level of the power voltage, and the first target level is higher than the second target level.

Voltage detection device and voltage protection method

A clock generator device includes a first clock generator circuit, a second clock generator circuit, a detector circuit and a selection circuit. The first clock generator circuit has a first starting voltage and generates a first clock signal in response to a supply voltage. The second clock generator circuit has a second starting voltage and generates a second clock signal in response to the supply voltage. The detector circuit detects the second clock signal to generate a validation signal. The selection circuit selectively outputs one of the first clock signal and the second clock signal according to the validation signal. The first starting voltage is lower than the second starting voltage.

Clock generator device and clock generation method

A clock generator device includes a detector circuit, a calibration circuit, and a free running oscillator. The detector circuit is configured to determine whether a reference clock signal is received from a transmission interface to output an enable signal. The calibration circuit is configured to generate a first signal in response to the enable signal and an output clock signal, and compare the first signal with a predetermined value to generate a calibration signal. The free running oscillator is configured to adjust a frequency of the output clock signal in response to the calibration signal.

Growing community of inventors

Hsinchu County, Taiwan

Wei-Ping Wang