Intel Corporation

Wei Li

Nicholas S Haehn

Ram S Viswanath

Mitul Bharat Modi

Gang Duan

Edvin Cetegen

Nicholas Neal

Xiaoqian Li

Daniel M Lavery

Yosuke Kanaoka

Arnab Roy

Yi Li

Abhinav Das

Jingyi Huang

Minglu Liu

Robin Mcree

Raquel De Souza Borges Ferreira

Hong Seung Yeon

Santosh Shaw

Saurabh S Shukla

A method for recognizing a reference point associated with a fiducial marker including the steps of: obtaining or receiving image data of the fiducial marker; determining the degree of which the image data of the fiducial marker is aligned with one or more reference images; of which if the degree of alignment is determined to be less than an acceptable threshold predicting a set of coordinates of the reference point associated with the fiducial marker; incorporating the set of coordinates with the image data to form a modified image data; and determining the degree of which the modified image data of the fiducial marker is aligned with one or more reference images.

Device and method for improved fiducial marker detection

Embodiments disclosed herein include photonics packages. In an embodiment, a photonics package includes a photonics die and a plurality of v-grooves on the photonics die. A barrier structure proximate the plurality of v-grooves.

Barriers for grooves in photonics dies

Embodiments include semiconductor packages and a method to form such semiconductor packages. A semiconductor package includes a plurality of dies on a substrate, and an encapsulation layer over the substrate. The encapsulation layer surrounds the dies. The semiconductor package also includes a plurality of dummy silicon regions on the substrate. The dummy silicon regions surround the dies and encapsulation layer. The plurality of dummy silicon regions are positioned on two or more edges of the substrate. The dummy silicon regions have a top surface substantially coplanar to a top surface of the dies. The dummy silicon regions include materials that include silicon, metals, or highly-thermal conductive materials. The materials have a thermal conductivity of approximately 120 W/mK or greater, or is equal to or greater than the thermal conductivity of silicon. An underfill layer surrounds the substrate and the dies, where the encapsulation layer surrounds portions of the underfill layer.

Mold shelf package design and process flow for advanced package architectures

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Chandler, AZ, United States of America

Wei Li