Taiwan Semiconductor Manufacturing Comp. Ltd.

National Taiwan University

Pegatron Corporation

Wei-Hao Lee

Chin-Hsiang Lin

Hsin-Chang Lee

Pei-Cheng Hsu

Huan-Ling Lee

Ta-Cheng Lien

Miin-Jang Chen

Yi-Ming Lee

Chia-Tung Kuo

Huan-yu Shih

Ting-Pi Sun

Chia-Liang Wei

Shiuan-Shuo Shiu

Ssu-Yun Chen

Jei-Hsiang Ma

Chih-Wei Chung

Ming-You Jiang

Coated nanotubes and bundles of nanotubes are formed into membranes useful in optical assemblies in EUV photolithography systems. These optical assemblies are useful in methods for patterning materials on a semiconductor substrate. Such methods involve generating, in a UV lithography system, UV radiation. The UV radiation is passed through a coating layer of the optical assembly, e.g., a pellicle assembly. The UV radiation that has passed through the coating layer is passed through a matrix of individual nanotubes or matrix of nanotube bundles. UV radiation that passes through the matrix of individual nanotubes or matrix of nanotube bundles is reflected from a mask and received at a semiconductor substrate.

Optical assembly with coating and methods of use

A pellicle assembly includes a pellicle membrane with a nanotube layer formed from thick nanotube bundles. The pellicle membrane can be formed with multiple layers and has a combination of long lifetime, high transmittance, low deflection, and small pore size. A conformal coating may applied to an outer surface of the pellicle membrane. The conformal coating protects the pellicle membrane from damage that can occur due to heat and hydrogen plasma created during EUV exposure.

Pellicle membrane with improved properties

An electronic device includes a processor, a battery, a charging circuit, a controller, and an arithmetic logic unit. The processor is capable of operating at a preset frequency or a low frequency. The charging circuit is electrically connected to an external power supply and a battery and transmits a disconnection signal and to be powered by the battery when the external power supply and the charging circuit are changed from a connected state to a disconnected state. The controller is configured to transmit a first control signal when the external power supply and the charging circuit are changed from the connected state to the disconnected state. The arithmetic logic unit is configured to transmit a frequency reduction signal to the processor according to the disconnection signal and the first control signal, so that the processor reduces the preset frequency to the low frequency and operates at the low frequency.

Electronic device and power management method therefor

In a method of manufacturing a high-electron mobility transistor (HEMT), a first Group III-V semiconductor layer is formed on a substrate. The first Group III-V semiconductor layer is patterned to form a fin and a recessed surface. A second Group III-V semiconductor layer is formed to cover a top surface and all side surfaces of the fin and the recessed surface. The second Group III-V semiconductor layer is formed by a plasma-enhanced atomic layer deposition, in which a plasma treatment is performed on every time an as-deposited mono-layer is formed.

HEMTs with an AlxGa1-xN barrier layer grown by plasma enhanced atomic layer deposition

Growing community of inventors

Taipei, Taiwan

Wei-Hao Lee