National Taiwan University

Industrial Technology Research Institute

Wei-Hao Chiu

Tsung-Hsien Lin

Yu-Hsiang Huang

Chuan-Ya Hung

Sung-Lin Tsai

Kun-Mu Lee

Sz-Ping Fu

Chung-Hsing Yang

Cheng-En Liu

Chen-Chien Lin

A frequency tracking circuit is disclosed. The frequency tracking circuit includes an edge selector, a phase-frequency processor and a digital controlled oscillator. The edge selector receives a data signal and feedback clock signal and sequentially outputs a data edge signal and a feedback-clock-edge signal. The phase-frequency processor receives the data edge signal and the feedback-clock-edge signal and outputs a frequency adjusting digital signal after executing differential operation according to a first phase difference and a second phase difference. The digital controlled oscillator receives the frequency adjusting digital signal so as to adjust frequency of the feedback clock signal. The phase-frequency processor outputs a frequency tracking signal to the edge selector, wherein the edge selector utilizes the frequency tracking signal for acquiring the data edge signal and utilizes the data edge signal for acquiring the feedback-clock-edge signal.

Frequency tracing circuit and method thereof

Methods for fabricating electrode structures on a substrate are presented. The fabrication method includes providing a substrate with a patterned metal layer thereon, defining an electrode area. A passivation glue is formed on the patterned metal layer. An electrode layer is formed in the electrode area. A filling process is performed to deposit nano metal oxides on the electrode layer to extensively fill the entire electrode area.

Method of fabricating electrode structures on substrate

A phase locked loop includes a voltage controlled oscillator operable to generate an output signal corresponding to a reference signal in response to a control voltage signal outputted by a filter in response to a current signal, and a variable frequency divider operable to perform frequency division on the output signal using a variable divisor so as to generate a divided feedback signal. A charge pump outputs the current signal in response to a phase detecting output from a phase/frequency detector indicating phases of the divided feedback signal and the reference signal. A phase error comparator outputs, in accordance with the phase detecting output, a digital output indicating whether the divided feedback signal lags or leads the reference signal and further indicating a phase difference between the divided feedback signal and the reference signal. The variable frequency divider determines a value of the variable divisor in accordance with the digital output to reduce the phase difference between the divided feedback signal and the reference signal.

Phase locked loop capable of fast locking

A voltage-to-digital converting device includes a first voltage-to-time converter outputting a first delay clock having a first time delay relative to a reference clock in response to an input voltage, and a second voltage-to-time converter outputting a second delay clock having a second time delay relative to the reference clock in response to a feedback voltage. The first and second time delays correspond respectively to the input and feedback voltages. A time-to-digital converting circuit receives the first and second delay clocks from the first and second voltage-to-time converters, compares phases of the first and second delay clocks, generates the feedback voltage based on result of phase comparison made thereby, and outputs a digital signal upon detecting that the phases of the first and second delay clocks are in-phase.

Voltage-to-time converter, and voltage-to-digital converting device having the same

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Taipei, Taiwan

Wei-Hao Chiu