Changxin Memory Technologies, Inc.

Wei Feng

Jingwen Lu

Bingyu Zhu

Zhaopei Cui

Haihan Hung

Embodiments disclose a buried bit line structure, a method for fabricating the buried bit line structure, and a memory. The buried bit line structure includes: a substrate having a bit line trench; a bit line metal filled in the bit line trench; and a bit line contact filled in the bit line trench and positioned on the bit line metal, where an arc-shaped contact surface is provided between the bit line contact and the bit line metal. By setting a contact surface between the bit line contact and the bit line metal to be the arc-shaped contact surface, a contact area between the bit line contact and the bit line metal is increased, electrical conductivity of the bit line structure is enhanced.

Buried bit line structure, method for fabricating buried bit line structure, and memory

A forming method of a semiconductor structure includes the following: providing a semiconductor substrate formed with a first mask layer having a preset pattern; forming a second mask layer having a first mask pattern on a surface of the first mask layer, wherein the first mask pattern includes a plurality of first sub-patterns arranged in sequence; forming a second mask pattern in the second mask layer through the first mask pattern in a self-alignment manner, wherein the second mask pattern includes the first sub-patterns of the first mask pattern and second sub-patterns corresponding to the first sub-patterns; etching the first mask layer based on the first sub-patterns and the second sub-patterns of the second mask pattern to convert the preset pattern into an active area pattern; and defining active areas in the semiconductor substrate based on the active area pattern.

Semiconductor structure and forming method thereof

The present disclosure provides a method of manufacturing a buried bit line structure and a buried bit line structure. The method of manufacturing a buried bit line structure includes: providing an initial structure, the initial structure including active region structures; forming an initial bit line trench, the initial bit line trench exposing the active region structure; forming a conductive structure, the conductive structure being located at the bottom of the initial bit line trench; forming a bit line contact structure, the bit line contact structure covering the conductive structure, and a top surface of the bit line contact structure being lower than a top surface of the active region structure; and forming an insulation structure, the insulation structure covering the bit line contact structure.

Buried bit line structure, manufacturing method thereof, and semiconductor structure

A method for forming a silicon dioxide film and a method for forming a metal gate are provided. The method for forming a silicon dioxide film includes: forming a silicon dioxide layer on a semiconductor substrate, performing a nitrogen treatment to the silicon dioxide layer to convert the silicon dioxide layer of partial thickness into a mixed layer of silicon nitride and silicon oxynitride; and removing the mixed layer to form a silicon dioxide film on the semiconductor substrate.

Method for forming silicon dioxide film and method for forming metal gate

A method of forming a semiconductor structure and the semiconductor structure are provided. The method includes the following operations. A semiconductor substrate is provided, in which a plurality of isolation grooves distributed at intervals are provided in the semiconductor substrate, and each of the isolation grooves includes a top region isolation groove and a bottom region isolation groove. A first protective layer covering the side wall of the top region isolation groove and the top of the semiconductor substrate is formed. Oxidation treatment is performed on the bottom region isolation groove to oxidize a part of the semiconductor substrate close to the bottom region isolation groove to form a second substrate isolation layer. A dielectric layer filling the isolation groove is formed. The first protective layer and the dielectric layer higher than the top of the semiconductor substrate are etched to form an isolation structure.

Method of forming semiconductor isolation structure and semiconductor isolation structure

A crane monitoring system includes a first detection apparatus, a processing apparatus and a second detection apparatus. The first detection apparatus is configured to detect a position of a crane, to send a first detection signal when the crane is located above a Front Opening Unified Pod (FOUP) load port of a semiconductor processing device, and to send a second detection signal when the crane leaves a space above the FOUP load port. The processing apparatus is configured to generate a start control signal responsive to receiving the first detection signal, and to generate a stop control signal responsive to receiving the second detection signal. The second detection apparatus is configured to start a detection of whether there is a foreign matter between the crane and the FOUP load port after receiving the start control signal, and to stop the detection after receiving the stop control signal.

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Hefei, China

Wei Feng