Realtek Semiconductor Inc.

Wei-Chung Cho

Jeong-Fa Sheu

Chen-Kuo Hwang

Mei-Chuan Lu

A test circuit for testing an integrated circuit includes a plurality of normal flip flops and a modified flip flop, wherein the integrated circuit includes a black box circuit and a plurality of combinational logic circuits. The normal flip flops each includes a first input pin, a second input pin and a first output pin and is configured to temporarily store the input value of the first input pin or the input value of the second input pin according to a scan enable signal. The modified flip flop includes a third input pin, a fourth input pin and a second output pin which are coupled to the black box circuit, the normal flip flops and the combinational logic circuits and is configured to temporarily store the input value of the third input pin or the input value of the fourth input pin according to a scan test mode signal.

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Hsinchu, Taiwan

Wei-Chung Cho