Taiwan Semiconductor Manufacturing Comp. Ltd.

National Sun Yat-sen University of Kaohsiung

Landmark Optoelectronics Corporation

Wei Chih Lin

Yung-Yao Lee

Chih Chien Lin

Po Yao Li

Tsung-Ying Wu

Shao Chang Tu

Jia-Ming Lin

Yi-Jen Chiu

Yang-Jeng Chen

Shiu-Ko JangJian

Chun Che Lin

Yung-Jr Hung

Chen-Yu Weng

Yun-Wen Chu

Rih-You Chen

Yung-Chou Shih

Kun-Dian She

Lichia Yang

Po-Yun Wang

Chung-Wei Hsiao

Kuang Yao Lo

Shu-Wei Chiu

Yin-Jie Ma

Hsien-Che Teng

A buffer for holding a pipe adapted to transport a fluid includes a base. The buffer further includes a plurality of fingers extending outwardly from a first side of the base, wherein a first finger of the plurality of fingers and a second finger of the plurality of fingers define a cavity for receiving the pipe, the first finger extends outwardly from a first end of the base, and the second finger extends outwardly from a central portion of the base, and a third finger of plurality of fingers extends outwardly from a second end of the base opposite the first end, wherein the second finger is between the first finger and the third finger. The buffer further includes at least one roller on a second side of the base opposite the first side.

Buffer for holding a pipe

A method of controlling a wafer stage includes moving the wafer stage to position an immersion hood over a first sensor in the wafer stage. The method further includes moving the wafer stage to position the immersion hood over a second sensor in the wafer stage. The method further includes moving the wafer stage to position the immersion hood over a first particle capture area on the wafer stage after moving the wafer stage to position the immersion hood over the second sensor. The method further includes moving the wafer stage to define a routing track over the first particle capture area. The method further includes moving the wafer stage to position the immersion hood over an area for receiving a wafer on the wafer stage after defining the routing track over the first particle capture area.

Method of using wafer stage

A wafer stage includes an area for receiving a wafer. The wafer stage further includes a first sensor outside of the area for receiving the wafer. The wafer stage further includes a second sensor outside of the area of receiving the wafer, wherein the second sensor is spaced from the first sensor. The wafer stage further includes a first particle capture area outside of the area for receiving the wafer, wherein the first particle capture area is spaced from both the first sensor and the second sensor, a dimension of the first particle capture area in a first direction parallel to a top surface of the wafer stage is at least 26 millimeters (mm), a dimension of the first particle capture area in a second direction parallel to the top surface of the wafer stage is at least 33 mm, and the second direction is perpendicular to the first direction.

Wafer stage and method of using

In some embodiments, the present disclosure relates to a process tool that includes a lithography apparatus arranged over a wafer chuck and an immersion hood apparatus laterally around the lithography apparatus. The lithography apparatus includes a photomask arranged between a light source and a lens. The immersion hood apparatus comprises input piping, output piping, and extractor piping. The input piping is arranged on a lower surface of the immersion hood apparatus and configured to distribute a liquid between the lens and the wafer chuck. The output piping is arranged on the lower surface of the immersion hood apparatus and configured to contain the liquid arranged between the lens and the wafer chuck. The extractor piping is arranged on an outer sidewall of the immersion hood apparatus and configured to remove any liquid above the wafer chuck that is outside of the immersion hood apparatus.

Extractor piping on outermost sidewall of immersion hood apparatus

A method of monitoring wear of a buffer includes holding a pipe for transporting a fluid and an electrical cable using a buffer placed on a support plate. The buffer includes a base, a plurality of fingers, and a roller contacting the support plate. The plurality of fingers includes a first finger, a second finger, and a third finger. The first finger and the second finger define a first cavity for receiving the pipe, and the second finger and the third finger defines a second cavity for receiving the electrical cable. The method includes detecting acoustic waves generated by the roller on the support plate. The method further includes analyzing changes in frequencies of the acoustic waves to determine an extent of the wear of the roller over time. The method includes triggering an alert when an increase in the frequencies of the acoustic waves exceeds a pre-determined threshold value.

Method of reducing friction-induced wear of pipe

A buffer for holding a pipe adapted to transport a fluid is provided. The buffer includes a base, a plurality of fingers extending outwardly from a first side of the base. A first finger of the plurality of fingers and a second finger of the plurality of fingers define a cavity for receiving the pipe. The buffer further includes at least one roller on a second side of the base opposite the first side.

System for reducing friction-induced wear of pipe

An immersion lithography system includes an immersion hood, wherein the immersion hood includes a lens system. The immersion lithography system further includes a wafer stage, wherein the wafer stage is moveable relative to the immersion hood, and the wafer stage includes an area for receiving a wafer. The immersion lithography system further includes a first particle capture area on the wafer stage outside of the area for receiving the wafer, wherein the first particle capture area includes silicon, silicon nitride oxide or a photoresist material.

Immersion lithography system and method of using

An optical mode converter is disclosed. The optical mode converter includes a substrate and a luminescent layer on the substrate. The luminescent layer includes an optical waveguide and an inclined mirror at an end of the optical waveguide. A light signal passes through the optical waveguide and is reflected by the inclined mirror to penetrate into the substrate. A method for manufacturing the optical mode converter is also disclosed.

Optical mode converter and method for manufacturing the same

A semiconductor laser apparatus is provided and has a substrate, a first type cladding layer, a first type waveguide layer, an active layer, a second type waveguide layer, a second type cladding layer, and a capping layer disposed in sequence. The active layer has a light producing portion and a light emitting portion. A laser produced by the light producing portion, emits along a direction from the light producing portion toward the light emitting portion. The light emitting portion includes a first inactive region, a light emitting region, and a second inactive region. A refractive index of the light emitting region is lower than a refractive index of the first inactive region, the refractive index of the light emitting region is lower than a refractive index of the second inactive region, and width of a first part of the light emitting region continuously increases along the direction.

Semiconductor laser apparatus

A method for fabricating a shallow trench isolation (STI) structure comprises the following steps. A silane-base precursor having a volumetric flowrate of 500 to 750 sccm and a nitrogen-base precursor having a volumetric flowrate of 300 to 600 sccm are introduced and mixed under a first pressure ranging from 0.5 to 1.5 torr at a first temperature ranging from 30 to 105 centigrade to deposit a flowable dielectric layer in a trench of a substrate. Then, ozone gas and oxygen gas are introduced and mixed under a second pressure ranging from 300 to 650 torr at a second temperature ranging from 50 to 250 centigrade to treat the flowable dielectric layer, wherein a volumetric flowrate ratio of ozone gas and oxygen gas ranges from 1:1 to 3:1. A method for fabricating a FinFET is provided.

Method for fabricating a fin field effect transistor and a shallow trench isolation

A method for fabricating a waveguide construction is described and has steps of: providing a layered structure by: forming a first-type InGaAsP layer on a substrate, forming a first-type InP layer on the first-type InGaAsP layer, forming an active layer containing gallium on the first-type InP layer, forming a second-type InP layer on the active layer, and forming a second-type InGaAsP layer on the second-type InP layer; forming an SiOpatterned layer having SiOregions and at least one channel facing toward a desired direction and formed between the SiOregions on the second-type InGaAsP layer; and performing a rapid thermal annealing treatment on the layered structure formed with the SiOpatterned layer. The rapid thermal annealing treatment has a treating temperature between 720&#xb0; C. and 760&#xb0; C. and a treating time between 60 and 240 seconds.

Method for fabricating waveguide construction

An interference lithography device is provided with a laser source for providing a laser beam; a base thereon having a beam splitter for dividing the laser beam into a first beam portion and a second beam portion, a beam expander, a first set of reflectors, and a second set of reflectors; a set of lower reflectors; and a sample carrying stage for holding a substrate. The first beam portion and the second beam portion are respectively reflected from the second set of reflectors and then respectively reflected by the set of lower reflectors to form an interference pattern on the substrate.

Interference lithography device

A fin field effect transistor (FinFET) including a substrate, a plurality of insulators, and a gate stack is provided. The substrate includes a plurality of trenches and at least one semiconductor fin between the trenches. The insulators are disposed in the trenches and include doped regions distributed therein. The gate stack partially covers the at least one semiconductor fin and the insulators. A method for fabricating the aforesaid FinFET is also discussed.

Growing community of inventors

Hsinchu, Taiwan

Wei Chih Lin