Taiwan Semiconductor Manufacturing Comp. Ltd.

Realtek Semiconductor Inc.

Macronix International Co., Ltd.

Tsinghua University

Wei-Chieh Huang

Jieh-Jang Chen

Feng-Jia Shiu

Chung-Yao Chang

Chin-Wei Liang

Ching-Sen Kuo

Chern-Yow Hsu

Yu-Ming Chang

Hsia-Wei Chen

Sheng-Chau Chen

Hsun-Chung Kuang

Nai-Ping Kuo

Hsiang-Pang Li

Yen-Chang Chu

Hung-Sheng Chang

Hung Chang Hsieh

Ting-Yu Liu

Li-Chun Huang

Chien-Hsin Liu

Chern-yow Hsu

Yi-Syun Yang

Tsai-Ming Huang

Cheng-Che Chung

Kuei-Cheng Chan

Chin-Liang Wang

Tzu-Hsiang Su

Chuan-Hu Lin

Ping-Hsien Lin

Chih-Peng Li

Tai-Chun Kuo

Chung-Yen Liu

Chia-Chun Tsui

In a method of manufacturing a semiconductor device, a first interlayer dielectric (ILD) layer is formed over a substrate, a chemical mechanical polishing (CMP) stop layer is formed over the first ILD layer, a trench is formed by patterning the CMP stop layer and the first ILD layer, a metal layer is formed over the CMP stop layer and in the trench, a sacrificial layer is formed over the metal layer, a CMP operation is performed on the sacrificial layer and the metal layer to remove a portion of the metal layer over the CMP stop layer, and a remaining portion of the sacrificial layer over the trench is removed.

Semiconductor device and methods of manufacturing thereof

A method includes providing a substrate having a conductive column, a dielectric layer over the conductive column, and a plurality of sacrificial blocks over the dielectric layer, the plurality of sacrificial blocks surrounding the conductive column from a top view; depositing a sacrificial layer covering the plurality of sacrificial blocks, the sacrificial layer having a dip directly above the conductive column; depositing a hard mask layer over the sacrificial layer; removing a portion of the hard mask layer from a bottom of the dip; etching the bottom of the dip using the hard mask layer as an etching mask, thereby exposing a top surface of the conductive column; and forming a conductive material inside the dip, the conductive material being in physical contact with the top surface of the conductive column.

Via structure and methods of forming the same

A method of fabricating a semiconductor device is disclosed. The method includes forming an opening with a tapered profile in a first material layer. An upper width of the opening is greater than a bottom width of opening. The method also includes forming a second material layer in the opening and forming a hard mask to cover a portion of the second material layer. The hard mask aligns to the opening and has a width smaller than the upper width of the opening. The method also includes etching the second material layer by using the hard mask as an etch mask to form an upper portion of a feature with a tapered profile.

Method of forming a bottom electrode of a magnetoresistive random access memory cell

VIA structure and methods of forming the same

The present disclosure provides a decoding device. The decoding device includes an iteration number computing unit and a recursive decoder. The iteration number computing unit receives multiple packet parameters corresponding to a packet and computes a codeword-number-per-symbol according to packet parameters, in which the packet includes multiple symbols. The iteration number computing unit computes an iteration number according to the codeword-number-per-symbol. The recursive decoder is coupled to the iteration number computing unit, and performs a decoding operation on a codeword within a data field of the packet according to the iteration number.

Decoding device and decoding method

A method for manufacturing a semiconductor device includes forming a structure protruding from a substrate, forming a dielectric layer covering the structure, forming a dummy layer covering the dielectric layer, and performing a planarization process to completely remove the dummy layer. A material of the dummy layer has a slower removal rate to the planarization process than a material of the dielectric layer.

Method for manufacturing semiconductor device

The invention discloses a convolutional code decoder and a convolutional code decoding method. The convolutional code decoder performs decoding operation according to a received data and an auxiliary data to obtain a target data and includes an error detection data generation circuit, a channel coding circuit, a selection circuit, and a Viterbi decoding circuit. The error detection data generation circuit performs an error detection operation on the auxiliary data to obtain an error detection data. The channel coding circuit, coupled to the error detection data generation circuit, performs channel coding on the auxiliary data and the error detection data to obtain an intermediate data. The selection circuit, coupled to the channel coding circuit, generates a to-be-decoded data according to the received data and the intermediate data. The Viterbi decoding circuit, coupled to the selection circuit, decodes the to-be-decoded data to obtain the target data.

Convolutional code decoder and convolutional code decoding method

The invention discloses a convolutional code decoder and a convolutional code decoding method. The convolutional code decoder and the convolutional code decoding method of the present invention perform decoding using predictive information, and therefore can demodulate/decode signals more quickly. Earlier completion of demodulation/decoding of signals can terminate the operation earlier and thereby achieve the effect of power savings. The convolutional code decoder performs decoding according to received data and auxiliary data to obtain target data, and includes a first error detection data generation circuit, a channel coding circuit, a first selection circuit, a first Viterbi decoding circuit, a second error detection data generation circuit, a comparison circuit, a second selection circuit, and a second Viterbi decoding circuit.

A receiving device comprises an iterative decoder, a first determination unit and a control unit. The iterative decoder is for receiving at least one coded signal and for performing an iterative decoding on the at least one coded signal, to generate a plurality of decoded signals, wherein the plurality of decoded signals comprise a first decoded signal from a first iteration, a second decoded signal from a second iteration and a third decoded signal from a third iteration. The first determination unit is for determining whether the plurality of decoded signals diverge, to generate a first determination result. The control unit is for generating a control signal according to at least the first determination result, wherein the control signal indicates the iterative decoder whether to stop performing the iterative decoding on the at least one coded signal.

Device and method of controlling an iterative decoder

Growing community of inventors

Hsinchu County, Taiwan

Wei-Chieh Huang