Taiwan Semiconductor Manufacturing Comp. Ltd.

Other

Wei Cheng Hsu

Kuo-Feng Yu

Jian-Hao Chen

Hui-Chi Chen

Wei-Cheng Wang

Shih-Hang Chiu

Chia-Wei Chen

Yen-Ju Chen

Chun-Chih Cheng

Kuan-Ting Liu

Wei-Chen Hsiao

A semiconductor device includes stacks of nano-structures that each extend in a first horizontal direction. The stacks each extend in a vertical direction and are separated from one another in a second horizontal direction. A first gate is disposed over a first subset of the stacks. A second gate is disposed over a second subset of the stacks. A first conductive capping layer is disposed over a substantial entirety of an upper surface of the first gate. A second conductive capping layer is disposed over a substantial entirety of an upper surface of the second gate. A dielectric structure is disposed between the first gate and the second gate in the second horizontal direction. The dielectric structure physically and electrically separates the first gate and the second gate. An upper surface of the dielectric structure is substantially free of having the first or second conductive capping layers disposed thereon.

Forming low-resistance capping layer over metal gate electrode

A semiconductor device includes a plurality of active region structures that each protrude upwards in a vertical direction. The active region structures each extend in a first horizontal direction. The active region structures are separated from one another in a second horizontal direction different from the first horizontal direction. A gate structure is disposed over the active region structures. The gate structure extends in the second horizontal direction. The gate structure partially wraps around each of the active region structures. A conductive capping layer is disposed over the gate structure. A gate via is disposed over the conductive capping layer. A dimension of the conductive capping layer measured in the second horizontal direction is substantially greater than a maximum dimension of the gate via measured in the second horizontal direction.

The present disclosure provides a semiconductor device and a method of forming the same. The semiconductor device includes a first channel members being vertically stacked, a second channel members being vertically stacked, an n-type work function layer wrapping around each of the first channel members, a first p-type work function layer over the n-type work function layer and wrapping around each of the first channel members, a second p-type work function layer wrapping around each of the second channel members, a third p-type work function layer over the second p-type work function layer and wrapping around each of the second channel members, and a gate cap layer over a top surface of the first p-type work function layer and a top surface of the third p-type work function layer such that the gate cap layer electrically couples the first p-type work function layer and the third p-type work function layer.

Metal gate cap

A hair clip and hairpin combining device includes a pin member pivotally coupled to a plate with a pivot axle and for allowing the plate to be rotated relative to the pin member between an open working position and a folded clamping position, and a spring member coupled between the ears and the flaps for maintaining the plate and the pin member either at the open working position as a hairpin or at the folded clamping position as a hair clip, and thus for allowing the hair clip and hairpin combining device to be changeable between the hair clip and the hairpin or for being used as either a hair clip or a hairpin.

Hair clip and hairpin combination

Growing community of inventors

Hsinchu, Taiwan

Wei Cheng Hsu