Infineon Technologies Ag

Infineon Technologies Austria Ag

Wee Boon Tay

Ralf Otremba

Klaus Schiess

Teck Sim Lee

Thomas Bemmerl

Wae Chet Yong

Chooi Mei Chong

Liu Chen

Sanjay Kumar Murugan

Chee Voon Tan

Lay Yeap Lim

Edward Myers

Bun Kian Tay

Wee Aun Jason Lim

Raynold Talavera Corocotchia

Thiong Zhou See

Kuan Ching Woo

Paul Armand Calo

Chai Chee Lee

Kuok Wai Chan

Chee Chiew Chong

Christoph Liebl

A molded semiconductor package arrangement may comprise a die pad configured to support a semiconductor; a set of leads; and a mold structure that is formed to enclose the semiconductor and the die pad within the mold structure. The set of leads and the die pad may be formed from a same piece of conductive material. An electrical contact plane of the set of leads may be offset from a bottom surface of the die pad. The mold structure may include a molded standoff that is beneath the die pad. A bottom surface of the molded standoff may extend below the electrical contact plane of the set of leads by a threshold distance that corresponds to a thickness of the molded standoff.

Topside-cooled semiconductor package with molded standoff

An interconnect clip includes a die contact portion having substantially planar upper and lower surfaces that are parallel to and opposite from one another, a bridge portion adjoining the die contact portion and having substantially planar upper and lower surfaces that are parallel to and opposite from one another, a lead contact portion adjoining the bridge portion and having a lead contact surface or contact point, and a bridge portion adjoining the die contact portion and having substantially planar upper and lower surfaces that are parallel to and opposite from one another. The lower surface of the die contact portion extends along a first plane. The lower surface of the bridge portion extends along a second plane that is completely above the first plane throughout a complete length of the bridge portion. The lead contact surface or contact point is disposed below the first plane.

Interconnect clip with angled contact surface and raised bridge

A leadless package includes an at least partially electrically conductive carrier having a mounting section and a lead section, an electronic chip mounted on the mounting section, and an encapsulant at least partially encapsulating the electronic chip and partially encapsulating the carrier so that at least part of an interior sidewall of the lead section not forming part of an exterior sidewall of the package is exposed.

Encapsulated leadless package having an at least partially exposed interior sidewall of a chip carrier

A semiconductor chip package includes a semiconductor chip, an encapsulation body encapsulating the semiconductor chip, a chip pad, and electrical contact elements connected with the semiconductor chip and extending outwardly. The encapsulation body has six side faces and the electrical contact elements extend exclusively through two opposing side faces which have the smallest surface areas from all the side faces. The semiconductor chip is disposed on the chip pad, and a main face of the chip pad remote from the semiconductor chip is at least partially exposed to the outside.

Semiconductor chip package having contact pins at short side edges

A strip of semiconductor devices includes a plurality of leadframes electrically isolated from each other, a plurality of semiconductor chips, and an encapsulation material. Each leadframe has a first surface and a second surface opposite to the first surface. At least one semiconductor chip of the plurality of semiconductor chips is electrically coupled to the first surface of each leadframe. The encapsulation material encapsulates each semiconductor chip and at least portions of each leadframe.

Strip testing of semiconductor devices

A semiconductor device includes a leadframe and a semiconductor chip including a contact. The contact faces the leadframe and is electrically coupled to the leadframe via solder. The semiconductor device includes a solder barrier adjacent to the first contact and an edge of the chip.

Semiconductor device including a solder barrier

Growing community of inventors

Melaka, Malaysia

Wee Boon Tay