Oracle America, Inc.

Waseem Ahmad

Dawei Huang

Drew George Doblar

Zuxu Qin

Arif Al Amin

Dong Joon Yoon

Osman Javed

Nirmal Chindhu Warke

Rajesh Kumar

Deqiang Song

Andrew Keith Joy

William Franklin Leven

Baoqing Huang

Daniel J Beckman

Simon Dennis Forey

Venkatesh Arunachalam

A feedback module is defined to receive as input a set of data sample signals and a set of reference sample signals. Each of the data and reference sample signals is generated by sampling a differential signal having been transmitted through a FIR filter. The feedback module is defined to operate a respective post cursor counter for each post cursor of the FIR filter and update the post cursor counters based on the received sets of data and reference sample signals. Also, the feedback module is defined to generate a tap weight adjustment signal for a given tap weight of the FIR filter when a magnitude of a post cursor counter corresponding to the given tap weight is greater than or equal to a threshold value. An adaptation module is defined to adapt a reference voltage used to generate the reference sample signals to a condition of the differential signal.

Real-time optimization of TX FIR filter for high-speed data communication

An analog baud rate clock and data recovery apparatus includes a first track and hold circuit that delays a received signal by one unit interval to create an odd signal; a second track and hold circuit that delays the received signal by one unit interval to create an even signal; a first comparator circuit; and a second comparator circuit. The first track and hold circuit outputs the odd signal to the first comparator circuit and the second comparator circuit. The second track and hold circuit outputs the even signal to the first comparator circuit and the second comparator circuit. The first comparator adds the odd signal to the even signal and outputs a first potential timing error. The second comparator subtracts the odd signal and the even signal and outputs a second potential timing error signal. A desired timing error signal is derived from the first and second potential timing error signals. The desired timing error signal is used to determine whether signal sampling is early or late.

Analog baud rate clock and data recovery

An linear equalizer system for a transmission channel includes an active inductor with a tunable inductance and quality factor. The active inductor includes a transconducting element. A current steering digital to analog converter controls the flow of a bias current through the transconducting element to tune the active inductor.

Equalizer system having a tunable active inductor

A two stage fully differential amplifier has been designed which works, in tandem with a TX-FIR, as a linear equalizer at low frequencies, not covered by the TX-FIR, and also acts as a linear amplifier at higher frequencies which are equalized by the TX-FIR. The amplifier as a frequency response which does not attenuate signals frequencies less than one twentieth of baud rate, creates gain peaking ion the region between one twentieth and one tenth of baud rate and maintains flat peak gain up to half of baud rate. Different aspects of the frequency response curve (such as dc gain, max gain and zero frequency) are completely programmable. Also, the differential amplifier has been designed from low power and process, voltage and temperature insensitive frequency response.

Method and apparatus for a high bandwidth amplifier with wide band peaking

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Union City, CA, United States of America

Waseem Ahmad