Ultratech, Inc.

Warren W Flack

Andrew M Hawryluk

Robert L Hsieh

Khiem K Nguyen

Emily M True

Manish Ranjan

Detlef Fuchs

Photolithographic methods of forming a roughened surface for an LED to improve LED light emission efficiency are disclosed. The methods include photolithographically imaging a phase-shift mask pattern onto a photoresist layer of a substrate to form therein a periodic array of photoresist features. The roughened substrate surface is created by processing the exposed photoresist layer to form a periodic array of substrate posts in the substrate surface. A p-n junction multilayer structure is then formed atop the roughened substrate surface to form the LED. The periodic array of substrate posts serve as scatter sites that improve the LED light emission efficiency as compared to the LED having no roughened substrate surface. The use of the phase-shift mask enables the use of affordable photolithographic imaging at a depth of focus suitable for non-flat LED substrates while also providing the needed resolution to form the substrate posts.

Photolithographic LED fabrication using phase-shift mask

An alignment system for aligning a wafer when lithographically fabricating LEDs having an LED wavelength &#x3bb;is disclosed. The system includes the wafer. The wafer has a roughened alignment mark with a root-mean-square (RMS) surface roughness &#x3c3;. The system has a lens configured to superimpose an image of the reticle alignment mark with an image of the roughened alignment mark. The roughened alignment marked image is formed with alignment light having a wavelength &#x3bb;that is in the range from about 2&#x3c3;to about 8&#x3c3;. An image sensor detects the superimposed image. An image processing unit processes the detected superimposed image to measure an alignment offset between the wafer and the reticle.

Optical alignment systems for forming LEDs having a rough surface

A phase-shift mask having a checkerboard array and a surrounding sub-resolution assist phase pattern. The checkerboard array comprises alternating phase-shift regions R that have a relative phase difference of 180 degrees. The sub-resolution assist phase regions R' reside adjacent corresponding phase-shift regions R and have a relative phase difference of 180 degrees thereto. The sub-resolution assist phase regions R&#x2032; are configured to mitigate undesirable edge effects when photolithographically forming photoresist features. Method of forming LEDs using the phase-shift mask are also disclosed.

Phase-shift mask with assist phase regions

Sub-field enhanced global alignment (SEGA) methods for aligning reconstituted wafers in a lithography process are disclosed. The SEGA methods provide the ability to accommodate chip placement errors for chips supported by a reconstituted wafer when performing a lithographic process having an overlay requirement. The SEGA methods include measuring chip locations to determine sub-fields of the reconstituted wafer over which enhanced global alignment (EGA) can be performed on the chips therein to within the overlay requirement. The SEGA methods further included individually performing EGA over the respective sub-fields. The SEGA methods take advantage of the benefits of both EGA and site-by-site alignment and are particularly applicable to wafer-level packing lithographic processes such as fan-out wafer-level packaging.

Sub-field enhanced global alignment

A method of aligning a wafer when lithographically fabricating a light-emitting diode (LED). The method includes forming on the wafer at least one roughened alignment mark having a root-mean-square (RMS) surface roughness &#x3c3;. The roughened alignment mark is formed as a consequence of forming a plasma etch to roughen a LED surface on which the wafer alignment mark resides. The method also includes imaging the at least one roughened wafer alignment mark with alignment light having a wavelength &#x3bb;that is in the range from about 2&#x3c3;to about 8&#x3c3;. The method also includes comparing the detected image to an alignment reference to establish wafer alignment. Once wafer alignment is established, p-contacts and n-contacts can be formed on the LED upper surface in their proper locations.

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San Jose, CA, United States of America

Warren W Flack