Cypress Semiconductor Corporation

Warren S Synder

Bert Sullam

Timothy John Williams

Harold Kutz

Eashwar Thiagarajan

Dennis Raymond Seguine

Gajender Rohilla

Fred Jaccard

An apparatus includes a configuration memory coupled to one or more structural arithmetic elements, the configuration memory to store values that cause the structural arithmetic elements to perform various functions. The apparatus also includes a system controller to dynamically load the configuration memory with values, and to prompt the structural arithmetic elements to perform functions according to the values stored by the configuration memory.

Dynamically configurable and re-configurable data path

A system for the calibration of a programmable system-on-a-chip is described. More specifically, embodiments of the present invention relate to a system that calibrates a programmable analog block in a system-on-a-chip without the use of external components.

On-chip calibration method

A system includes a plurality of datapaths, each having structural arithmetic elements to perform various arithmetic operations based, at least in part, on configuration data. The system also includes a configuration memory coupled to the datapaths, the configuration memory to provide the configuration data to the datapaths, which causes the datapaths to collaborate when performing the arithmetic operations.

Clock driven dynamic datapath chaining

A circuit comprising an oscillator configured to provide a first output signal in response to one or more input signals. A divider circuit may be configured to receive the first output signal of the oscillator circuit and to present a signal having a second frequency at a second output. A frequency comparator circuit may receive the second output signal and an external signal having a third frequency and may present a third output signal representing control information. A processor circuit may be coupled to the oscillator circuit, the divider circuit and the comparator circuit. The processor circuit may control the frequency of oscillation of the first output.

Microprocessor controlled frequency lock loop for use with an external periodic signal

A circuit for presenting one or more current source outputs which may be used to optimize the interface between optical components in a computer system. The multiple currents may be independently varied in each particular component to provide a current adjustment for proper functioning of a wide variety of LEDs and photo transistors. As a result, a dynamic optimization of the devices is provided. Since the present invention allows a wide variety of optical components to be used, the overall cost of implementing the device may be reduced.

Method and software for optimizing an interface between components

A circuit and method for synchronizing a data signal to one of a plurality of clocks. The clock may include (i) a pulse generator configured to generate two pulses separated by a delay, (ii) a clock generator configured to generate the plurality of clocks, and (iii) a logic circuit configured to select the clock for synchronizing the data signal.

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Snohomish, WA, United States of America

Warren S Synder