Xerox Corporation

Warren L Hall

Frank M Nelson

George E Mager

Charles P Holt

John W Daughton

Edward L Steiner

Kenneth Gillett

Kenton W Fiske

Gerald E Carlson

Thomas Criswell

Jerome S Raskin

A controller having dedicated fuser circuitry and a processor for controlling the fuser heating element. The dedicated fuser circuitry interconnects an input voltage source to the processor through a low voltage power supply to provide a reference signal and a sample DC voltage signal representative of the input voltage source. The processor provides a digital signal to activate a triac connected to the fuser heating element. The triac, selectively gates the input voltage source across the heating element. A plurality of ranges of digital signals and a plurality of corresponding triac activation rates are provided for variations in input voltage. A digital signal related to a particular value of the input voltage source lies within one of the plurality of ranges determining the particular activation rate of the triac.

Open loop fuser control

In a controller for a host machine such as an electrostatographic copier having a central processing unit module connected via a system bus to an input-output processing unit module, a direct memory access system functioning as part of the input-output processing unit module and operative to provide a high-speed means of refreshing and updating control registers in the host machine by direct accessing of memory in the central processing unit module. The direct memory access system may be programmed to synchronously refresh-update the host machine's control registers as in its normal mode and also asynchronously refresh-update the control registers as in the abnormal mode of a detected electrical disturbance in the electro-sensitive periphery surrounding the control registers, thus requiring restoring thereof. High-speed movement of data by the direct memory access system is achieved through dedicating a portion of random access memory in the central processing unit module for such accessing, and transferring control of the system bus from the central processing unit module to the direct memory access system. This enables data accessed through a fixed sequence of addresses from dedicated memory to be transferred directly to the host machine's control registers without incurring time constants that would otherwise be had if the data were to be manipulated by a central processor in the central processing unit module.

Direct memory access module for a controller

In a control module having a central processor coupled through a system bus including data, address and control lines to access a data memory, a direct access apparatus is included coupled through the system bus to request a hold of the central processor and upon acknowledgement for directly accessing the data memory through the system bus for directing the control registers of a host machine. Also included are a diriment element interfaced to the central processor for receipt of control signals on the system bus from the direct access apparatus for hold request and for transmission of first and second control signals on the system bus from the central processor for acknowledgement, and a timed protocol unit for supervising the data, address and control signals transported on the system bus. The timed protocol unit comprises an address control coupled through the system bus to the central processor for disenabling address signals upon receipt of the first acknowledgement signal on the system bus from the diriment element, and a data control coupled through the system bus to the central processor for bidirectionally disenabling data signals upon receipt of the second acknowledge signal on the system bus from the diriment element.

System bus module for a controller

Growing community of inventors

Palos Verdes, CA, United States of America

Warren L Hall