Raytheon Company

Ward G Fillmore

William J Davis

Paul J Duval

Scott Tarvyd MacDonald

Susan C Trulli

Jason G Milne

Robert B Hallock

Yiwen Zhang

Scott Macdonald

A substrate having an air bridge structure with end portions disposed and supported on the substrate and an elevated portion disposed between the end portions is coated with a protective layer. The protective layer is patterned to: leave portions of the protective layer over elevated portion and at least over the end portions of a region under the elevated portion of the air bridge structure; and remove portions over adjacent portions of the substrate. A dielectric material having a thickness greater than the height of the air bridge structure is deposited over the patterned protective layer portions remaining over elevated portion and over the adjacent portions of the substrate, the patterned temporary coating preventing the dielectric material from passing into the region under the elevated portion of the air bridge structure. The dielectric material is patterned to remove portions of the dielectric material over the patterned protective layer remaining over elevated portion while leaving the dielectric material over the adjacent portions of the substrate. The patterned protective layer portions remaining over elevated portion are removed while leaving the dielectric material over the adjacent portions of the substrate.

Air bridge structure having dielectric coating

A package for a plurality of semiconductor devices having: an electrical interconnect structure, comprising: an electrical interconnect structure; and an active device structure, comprising the plurality of semiconductor devices on an active device substrate. The electrical interconnect structure is bonded to the active device structure and the electrical interconnect structure provides electrical interconnection among the semiconductor devices.

Laminated transferable interconnect for microelectronic package

A package and method for packaging a semiconductor device formed in a surface portion of a semiconductor wafer. The package includes: a dielectric layer disposed on the surface portion of the semiconductor wafer having a device exposing opening to expose one of the devices and an electrical contacts pad opening to expose an electrical contact pad; and a porous material in the device exposing opening over said one of the devices.

Method for packaging semiconductors at a wafer level

A method for packaging a plurality of semiconductor devices formed in a surface portion of a semiconductor wafer. The method includes: lithographically forming, in a first lithographically processable material disposed on the surface portion of the semiconductor wafer, device exposing openings to expose the devices and electrical contact pad openings to expose electrical contact pads for devices; and mounting a support having a rigid dielectric layer formed on a selected portion of the support, such rigid dielectric layer comprising a second lithographically processable material, such rigid material being suspended over the device exposing openings and removed from portions of the support disposed over the electrical contacts pads openings in the first lithographically processable material. The support is released and removed from the second lithographically processable material, leaving the second photolithographically processable material bonded to the first photolithographically processable material.

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Hudson, MA, United States of America

Ward G Fillmore