Xiamen Tianma Display Technology Co., Ltd.

Xiamen Tianma Micro-electronics Co., Ltd.

Wanming Huang

Jieliang Li

Yuheng Zhang

Yong Yuan

Yingteng Zhai

A display panel includes a pixel circuit including a driving transistor, a driving circuit configured to provide a control signal to the pixel circuit, and a clock signal line configured to provide a clock signal for the driving circuit. The pixel circuit further includes a first transistor and a second transistor. The driving circuit includes a first driving circuit configured to provide a control signal to the first transistor, and a second driving circuit configured to provide a control signal to the second transistor. The clock signal line includes a first clock signal line configured to provide a first clock signal to the first driving circuit, and a second clock signal line configured to provide a second clock signal to the second driving circuit.

Display panel and display device

A display panel includes a pixel circuit including a driving transistor, a driving circuit configured to provide a control signal to the pixel circuit, and a clock signal line configured to provide a clock signal for the driving circuit. A data refresh period of the pixel circuit includes a data writing stage and a holding stage. When the pixel circuit is operated in the data writing stage, a clock pulse frequency of the clock signal is a first frequency F1 in at least one stage of the N stages. When the pixel circuit is operated in the holding stage, the clock pulse frequency of the clock signal is a second frequency F2 in at least one stage of the N stages, the clock pulse frequency of the clock signal is a third frequency F3 in at least one stage of the N stages. F1>F2>F3≥0.

A display panel includes a pixel circuit, a driving circuit, and a clock signal line. The driving circuit is configured to provide a control signal to the pixel circuit. The clock signal line is configured to provide a clock signal for the driving circuit. A data refresh period of the pixel circuit includes a data writing stage and a holding stage, and the holding stage includes N stages arranged in sequence, N≥1. When the pixel circuit is operated in the data writing stage, a clock pulse frequency of the clock signal is a first frequency F1. When the pixel circuit is operated in the holding stage, in at least one stage of the N stages, the clock pulse frequency of the clock signal is a second frequency F2, F1>F2>0. The pixel circuit includes a driving transistor, a first transistor, and a second transistor.

A display panel includes a pixel circuit, a driving circuit, and a clock signal line. The driving circuit is configured to provide a control signal to the pixel circuit. The clock signal line is configured to provide a clock signal for the driving circuit. A data refresh period of the pixel circuit includes a data writing stage and a holding stage. The holding stage includes N stages arranged in sequence, N≥1. When the pixel circuit is operated in the data writing stage, a clock pulse frequency of the clock signal is a first frequency F1. When the pixel circuit is operated in the holding stage, in at least one stage of the N stages, the clock pulse frequency of the clock signal is a second frequency F2.

A display panel includes a pixel circuit. An operation process of the pixel circuit includes a first data refresh period, a data adjustment stage, and a second data refresh period set in sequence, the data adjustment stage includes a first data adjustment stage. The first data adjustment stage includes Tfirst sub-data adjustment stages set in sequence, each first sub-data adjustment stage includes mdata writing frames and nholding frames. The operation process of the pixel circuit further includes a first data refresh frequency Fand a second data refresh frequency F, and F<F. When the pixel circuit is operated at the first data refresh frequency F, the first data adjustment stage includes Tfirst sub-data adjustment stages set in sequence. When the pixel circuit is operated at the second data refresh frequency F, the first data adjustment stage includes Tfirst sub-data adjustment stages set in sequence. T>T

Display panel and display device with reduced screen flicker

A display panel and a display device are provided. The display panel includes a pixel circuit. An operation process of the pixel circuit includes a first data refresh period, a data adjustment stage, and a second data refresh period set in sequence, the data adjustment stage includes a first data adjustment stage and a second data adjustment stage set in sequence. The first data adjustment stage includes T1 first sub-data adjustment stages set in sequence, each first sub-data adjustment stage includes m1 data writing frames and n1 holding frames, T1≥1, m1≥0, n1≥0, and m1+n1≥1. The second data adjustment stage includes T2 second sub-data adjustment stages set in sequence, each second sub-data adjustment stage includes m2 data writing frames and n2 holding frames, T2≥1, m2≥0, n2≥0, and m2+n2≥1. T1>T2, T1/T2=(m2+n2)/(m1+n1).

A display panel includes a pixel circuit. An operation process of the pixel circuit includes a first data refresh period, a data adjustment stage, and a second data refresh period set in sequence, the data adjustment stage includes a first data adjustment stage, a second data adjustment stage, and a third data adjustment stage set in sequence. The first data adjustment stage includes Tfirst sub-data adjustment stages set in sequence, each first sub-data adjustment stage includes mdata writing frames and nholding frames. The second data adjustment stage includes Tsecond sub-data adjustment stages set in sequence, each second sub-data adjustment stage includes mdata writing frames and nholding frames. The third data adjustment stage includes Tthird sub-data adjustment stages set in sequence, each third sub-data adjustment stage includes mdata writing frames and nholding stages set in sequence.

A display panel and a display device are provided. The display panel includes a pixel circuit, a driving circuit configured to provide a control signal for the pixel circuit, and a clock signal line configured to provide a clock signal for the driving circuit. A data refresh period of the pixel circuit includes a data writing stage and a holding stage, the holding stage includes N stage arranged in sequence and N&#x2265;1. When the pixel circuit is operated in the data writing stage, the clock pulse frequency of the clock signal is a first frequency F; when the pixel circuit is operated in the holding stage, in at least one of the N stages, the clock pulse frequency of the clock signal is a second frequency F; and F&#x3e;F&#x3e;0.

Display panel comprising driving circuit and pixel circuit, and display device

A display panel and a display device are provided. The display panel includes a pixel circuit; and a light-emitting element. The operation process of the pixel circuit includes a first data refresh period, a data adjustment stage, and a second data refresh period set in sequence. The data adjustment stage includes Tfirst sub-data adjustment stages set in sequence and Tsecond sub-data adjustment stages set in sequence. A quantity of the data writing frames in the first sub-data adjustment stage is greater than a quantity of the data writing frames in the second sub-data adjustment stage. A quantity of the holding frames in the first sub-data adjustment stage is smaller than a quantity of the holding frames in the second sub-data adjustment stage.

A display device includes a pixel driving circuit and a light-emitting element. The pixel driving circuit includes an initialization signal terminal, a data signal terminal, a first initialization unit, a driving module and a first light-emitting control unit. The first initialization unit is electrically connected between the initialization signal terminal and an anode of the light-emitting element. In a write frame, the first initialization unit is configured to, under control of a first scan signal, provide the anode of the light-emitting element with a first initialization voltage signal Vref. In a maintenance frame, the first initialization unit is configured to, under the control of the first scan signal, provide the anode of the light-emitting element with a second initialization voltage signal Vrefwhich is different from the first initialization voltage signal Vref

Display panel, driving method thereof and display device

A pixel circuit, a method for driving a pixel circuit and a display panel are provided. An exemplary pixel circuit includes a data writing module and a driving transistor, a voltage of a first terminal of the driving transistor being greater than a voltage of a second terminal; a light-emitting control module and a light-emitting device, the light-emitting device being configured to emit light in response to the driving current generated by the driving transistor; a first initialization module and a second initialization module; and a reset module configured to cause the voltage of the second terminal of the driving transistor to be greater than or equal to the voltage of the first terminal of the driving transistor in response to a current-stage reset signal, an enable signal of the current-stage reset signal appearing after an enable signal of the current-stage light-emitting signal.

Pixel circuit and driving method thereof, display panel and display apparatus

Disclosed are a display panel, a driving method and a display device. The display panel includes a strobe circuit, a pixel driving circuit and a light-emitting element; the pixel driving circuit includes a first initialization unit, a driving module, and a first light-emitting control unit; the strobe circuit is electrically connected to an initialization signal end; and the first initialization unit is electrically connected between the initialization signal end and an anode of the light-emitting element; in a write frame, the first initialization unit is configured to provide a first initialization voltage signal Vrefto the anode of the light-emitting element under the control of a first scan signal; and in a hold frame, the first initialization unit is configured to provide a second initialization voltage signal Vrefto the anode of the light-emitting element under the control of the first scan signal.

Display panel, driving method and display device

Driving method for driving circuit, display panel, and display device are provided. The method includes: in a data writing stage, transmitting data signal voltage to a gate electrode of the driving transistor in response to a scan signal in a first scan signal line; in a light-emitting stage, turning on a driving path connecting the driving transistor to the light-emitting device, and making the driving transistor generate a driving current based on the voltage of the gate electrode in the driving transistor to drive the light-emitting device to emit light, in response to a light-emitting signal in a light-emitting signal line; and in a compensation stage, compensating the voltage of the gate electrode in the driving transistor by using a first power signal voltage. The light-emitting stage and the compensation stage overlap with each other, and a starting time of the compensation stage is after a starting time of the light-emitting stage.

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Xiamen, China

Wanming Huang