Samsung Electronics Co., Ltd.

Wangsoo Kim

Hangi Jung

Yoo-Chang Sung

Seunghwan Hong

Indal Song

Hae Young Chung

Heon Su Jeong

Seongho Cho

Hojung Kim

Hun-Dae Choi

Wooyoung Choi

Jae-Hun Jung

Moonseung Yang

Kiduk Park

Cheongryong Cho

Jinsung Youn

A memory device of a memory module includes a CA buffer that receives a command/address (CA) signal through a bus shared by a memory device different from the memory device of the memory module, and a calibration logic circuit that identifies location information of the memory device on the bus. The memory device recognizes its own location on a bus in a memory module to perform self-calibration, and thus, the memory device appropriately operates even under an operation condition varying depending on a location in the memory module.

Memory device performing self-calibration by identifying location information and memory module including the same

A receiver includes an amplifier that receives a transmission signal and amplifies a first voltage difference between the transmission signal and a reference signal to generate a first output signal and a second output signal at a first node and a second node. An equalizer is provided, which is connected to the first node and the second node and receives the transmission signal. The equalizer compensates a common-mode offset between the first output signal and the second output signal based on a second voltage difference between an average voltage level of the transmission signal and the reference signal.

Receiver for compensating common mode offset

An electronic circuit may include a driver, a delay circuit, a strength control circuit, and an adder circuit. The driver may generate a second signal based on a first signal. The delay circuit may delay the first signal by as much as a reference time, to generate a third signal. The strength control circuit may adjust an amplitude of the third signal to generate a fourth signal. The adder circuit may add the second signal and the fourth signal to generate a fifth signal. In a first time interval determined based on the reference time, an amplitude of the fifth signal may be greater than an amplitude of the second signal. In a second time interval except for the first time interval, the amplitude of the fifth signal may be smaller than the amplitude of the second signal. In the second time interval, the amplitude of the fifth signal may be smaller than an amplitude of the first signal.

Electronic circuits for outputting post emphasis signals

Provided are an adaptive equalizer for adaptively controlling an equalization coefficient until two comparators outputs a same value, after generating a sensitivity difference between signals at a front end of each comparator for performing sampling, and a method of controlling the adaptive equalizer.

Adaptive equalizer and method of controlling the same

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Seoul, South Korea

Wangsoo Kim