Eugene Technology Co., Ltd.

Wan Suk Oh

Seung Woo Shin

Sang Ho Woo

Hai Won Kim

Gil Sun Jang

Sung Kil Cho

Seong Jin Park

Woo Duck Jung

Ho Min Choi

Cha Young Yoo

Eun Ho Kim

Sung-Kil Cho

Seung-Woo Shin

Doo Yeol Ryu

Ki Ho Kim

Hui Sik Kim

Koon Woo Lee

Hyuk Lyong Gwon

Kang-Wook Lee

Provided is a method for forming an epitaxial layer at a low temperature. The method for forming the epitaxial layer includes transferring a substrate into an epitaxial chamber and performing an epitaxial process on the substrate to form an epitaxial layer on the substrate. The epitaxial process includes heating the substrate at a temperature of about 700&#xb0; C. or less and injecting a silicon gas into the epitaxial chamber in a state in which the inside of the epitaxial chamber is adjusted to a pressure of about 300 Torr or less to form a first epitaxial layer, stopping the injection of the silicon gas and injecting a purge gas into the epitaxial chamber to perform first purge inside the epitaxial chamber, heating the substrate at a temperature of about 700&#xb0; C. or less and injecting the silicon gas into the epitaxial chamber in the state in which the inside of the epitaxial chamber is adjusted to a pressure of about 300 Torr or less to form a second epitaxial layer, and stopping the injection of the silicon gas and injecting the purge gas into the epitaxial chamber to perform second purge inside the epitaxial chamber.

Method for forming epitaxial layer at low temperature

Provided is a method of manufacturing a memory device having a 3-dimensional structure, which includes alternately stacking one or more dielectric layers and one or more sacrificial layers on a substrate, forming a through hole passing through the dielectric layers and the sacrificial layers, forming a pattern filling the through hole, forming an opening passing through the dielectric layers and the sacrificial layers, and supplying an etchant through the opening to remove the sacrificial layers. The stacking of the dielectric layers includes supplying the substrate with one or more gases selected from the group consisting of SiH, SiH, SiH, and SiH, to deposit a silicon oxide layer. The stacking of the sacrificial layers includes supplying the substrate with one or more gases selected from the group consisting of SiH, SiH, SiH, SiH, and dichloro silane (SiClH), and ammonia-based gas, to deposit a silicon nitride layer.

Method and apparatus for manufacturing three-dimensional-structure memory device

Provided is a method for forming a silicon film, and more particularly, to a method for forming a polycrystalline silicon film including pretreatment process in a process for forming a silicon film. According to an embodiment of the present invention, a method for forming a polycrystalline silicon film by annealing a amorphous silicon film deposited on a base, the method includes a pretreatment process of allowing a pretreatment gas including at least one of N, C, O and B to flow.

Method for forming polysilicon film

A method for manufacturing a memory device having a vertical structure according to one embodiment of the present invention comprises: a step for alternatingly laminating one or more insulation layers and one or more sacrificial layers on a substrate; a step for forming a penetration hole for penetrating the insulation layer and the sacrificial layer; a step for forming a pattern for filling up the penetration hole; a step for forming an opening for penetrating the insulation layer and the sacrificial layer; and a step for removing the sacrificial layer by supplying an etchant through the opening, wherein the step for laminating the insulation layer includes a step for depositing a first silicon oxide film by supplying to the substrate at least one gas selected from the group consisting of SiH, SiH, SiH, SiH, and the step for laminating the sacrificial layer includes a step for depositing a second silicon oxide film by supplying dichlorosilane (SiClH) to the substrate.

Growing community of inventors

Gyeonggi-do, South Korea

Wan Suk Oh