Samsung Electronics Co., Ltd.

Wan-Shick Hong

Kwan-Wook Jung

Mun-Pyo Hong

Sang-Gab Kim

Sang-Il Kim

Sung-Hoon Yang

Soo-Guy Rho

Jin-Kyu Kang

Snag-Gab Kim

Bo Sung Kim

Joon-Hoo Choi

Dae-Jin Kwon

Kyuha Chung

Kyu-Ha Jung

Chong-Chul Chai

Nam-Seok Roh

Byung-Keun Hwang

Glenn Allen Cerny

The present invention relates to a process for vapor depositing a low dielectric insulating film, a thin film transistor using the same, and a preparation method thereof, and more particularly to a process for vapor deposition of low dielectric insulating film that can significantly improve a vapor deposition speed while maintaining properties of the low dielectric insulating film, thereby solving parasitic capacitance problems to realize a high aperture ratio structure, and can reduce a process time by using silane gas when vapor depositing an insulating film by a CVD or PECVD method to form a protection film for a semiconductor device. The present invention also relates to a thin film transistor using the process and preparation method thereof.

Deposition method of insulating layers having low dielectric constant of semiconductor device, a thin film transistor substrate using the same and a method of manufacturing the same

A method for manufacturing a semiconductor device including forming a first wire on a substrate, forming a lower film on the first wire, forming a photosensitive pattern on the lower film using a photosensitive material, forming contact holes for exposing the first wire by etching the lower film using the photosensitive film as an etching mask, removing part of the photosensitive film pattern by an ashing process to expose a borderline of the lower film defining the contact holes and forming second wire connected to the first wire via the contact holes.

Contact portion of semiconductor device, and thin film transistor array panel for display device including the contact portion

A black matrix having an opening at pixels of a matrix array in a display area, a common wire including common pads and common signal lines, and gate pads in a peripheral area, and an alignment key in outer area to align interlayer thin films are formed on an insulating substrate. Red, blue and green color filters the edge of which overlap the black matrix are formed at the pixels on the insulating substrate, and an organic insulating layer covering the black matrix and the color filters and having a contact hole exposing the gate pad is formed thereon. A gate wire including a gate line connected to the gate pad through the contact hole and a gate electrode connected to the gate line is formed on the organic insulating layer, and a gate insulating layer covering the gate wire is formed on the organic insulating layer. A semiconductor pattern and ohmic contact layers are sequentially formed on the gate insulating layer of the gate electrode. A data wire including a source electrode and a drain electrode that are made of a same layer on the ohmic contact layers and separated from each other, and a data line connected to the source electrode and defining the pixels of a matrix array by crossing the gate line is formed on the gate insulating layer. A passivation layer covering the data wire and having contact holes exposing the gate pad and the data pad is formed, and a pixel wire including a pixel electrode, a redundant gate pad, a redundant data pad that are respectively connected to the drain electrode, the gate pad and the data pad through the contact holes.

Thin film transistor array panel for liquid crystal display

A thin film transistor array substrate is provided. The substrate includes an insulating substrate, a first signal line formed on the insulating substrate, a first insulating layer formed on the first signal line, a second signal line formed on the first insulating layer while crossing over the first signal line, a thin film transistor connected to the first and the second signal lines, a second insulating layer formed on the thin film transistor, the second insulating layer having dielectric constant about 4.0 or less, and the second insulating layer having a first contact hole exposing a predetermined electrode of the thin film transistor, and a first pixel electrode formed on the second insulating layer while being connected to the predetermined electrode of the thin film transistor through the first contact hole.

Thin film transistor array substrate using low dielectric insulating layer and method of fabricating the same

A method for manufacturing a semiconductor device including forming a first wire on a substrate, forming a lower film on the first wire, forming a photosensitive pattern on the lower film using a photosensitive material, forming contact holes for exposing the first wire by etching the lower film using the photosensitive film as an etching mas, removing part of the photosensitive film pattern by an ashing process to expose a borderline of the lower film defining the contact holes and forming second wire connected to the firs wire via the contact holes.

Thin film transistor array panel for a liquid crystal display and methods for manufacturing the same

Pixels of red, blue and green are sequentially arranged in the row direction. The red and green pixels are alternately arranged in the column while the blue pixels being arranged between the neighboring red and each blue pixel is surrounded by the four red and green pixels. Gate lines are arranged at respective pixel rows. Data lines cross over the gate lines in an insulating manner and are arranged at the respective pixel columns. Pixel electrodes and thin film transistor are arranged at the respective pixels. At a predetermined pixel unit, the data lines to the two blue pixel are connected to each other. The pixel electrodes are overlapped with the gate lines or data lines via a passivation layer of low dielectric organic material or insulating material such as SiOC, SiOF.

Thin film transistor array for a liquid crystal display having a data line cross-connection

A gate wire is formed on a substrate. Next, after forming a gate insulating film, a semiconductor layer and an ohmic contact layer subsequently are formed thereon. Next, a data wire is formed. Next, a passivation layer and an organic insulating film are deposited, and patterned to form contact holes for exposing the drain electrode, the gate pad and the data pad, respectively. Here, the organic insulating film around the contact holes is formed thinner than that in the other portions. Next, the organic insulating film around the contact holes is removed by an ashing process to expose the borderline of the passivation layer in the contact holes, thereby removing an under-cut. Then, a pixel electrode, an assistant gate pad and an assistant data pad respectively connected to the drain electrode, the gate pad and the data pad are formed.

The present invention relates to a process for vapor depositing alow dielectric insulating film, and more particularly to a process for vapor deposition of low dielectric insulating film that can significantly improve a vapor deposition speed while maintaining properties of the low dielectric insulating film, thereby solving parasitic capacitance problems to realize a high aperture ratio structure, and can reduce a process time by using silane gas when vapor depositing an insulating film by a CVD or PECVD method to form a protection film for a semiconductor device.

Deposition method of insulating layers having low dielectric constant of semiconductor devices

The present invention relates to a process for vapor depositing a low dielectric insulating film, a thin film transistor using the same, and a preparation method thereof, and more particularly to a process for vapor deposition of lowdielectric insulating film that can significantly improve a vapor deposition speed while maintaining properties of the low dielectric insulating film, thereby solving parasitic capacitance problems to realize a high aperture ratio structure, and can reduce a process time by using silane gas when vapor depositing an insulating film by a CVD or PECVD method to form a protection film for a semiconductor device. The present invention also relates to a thin film transistor using the process and preparation method thereof.

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Seoul, South Korea

Wan-Shick Hong