Au Optronics Corporation

Wan-Jung Chen

Chih-Yuan Chien

Yu-ju Kuo

Kuo-Hsing Cheng

Yu-Chung Yang

Chun-Huan Chang

Yu-Ju Kuo

An exemplary gate driving circuit is adapted for driving a display panel including multiple pixels and includes a first gate driving unit string and a second gate driving unit string. The first gate driving unit string includes multiple cascade-connected first gate driving units and receives a start pulse. The first gate driving units are for generating output pulses to drive the pixels. The second gate driving unit string includes multiple cascade-connected second gate driving units and receives the start pulse. The second gate driving units are for generating output pulses to drive the pixels. The output pulse generated from one of the second gate driving units is provided to one of first gate driving units to determine whether to disable the output pulse of the first gate driving unit which receives the output pulse generated from the second gate driving units.

Display panel and gate driving circuit and driving method for gate driving circuit

A driving circuit unit outputting a driving signal includes an input unit, an assistant output unit and an output unit. The input unit is coupled to an input node and receives a start signal to make the input node have a potential. The assistant output unit receives a first clock signal to increase the potential of the input node. The output unit receives a second clock signal to increase the potential of the input node and outputs the driving signal. A gate driving circuit is also disclosed.

Gate driving circuit and driving circuit unit thereof

A gate driving circuit for driving plural scan lines of a liquid crystal display includes N driving circuit units and a control unit. Each of the N driving circuit units sequentially outputs a driving signal to drive a corresponding scan line of the scan lines. The control unit outputs a positive-phase and an opposite-phase clock signal to control the N driving circuit units. After an Ndriving circuit unit of the N driving circuit units outputs the driving signal, the control unit transmits a control signal to at least one of the N driving circuit units. A method for driving the foregoing gate driving circuit is also disclosed.

Gate driving circuit and driving method thereof

A shift register array is provided. The shift register array includes a plurality of shift registers connected in serial. The shift register includes a first transistor coupled between a first input terminal and a first node, a second transistor coupled between a first clock input terminal and an output terminal and a pull-up unit. The first transistor has a gate coupled to the first input terminal. The second transistor has a gate coupled to the first node. The pull-up unit includes a third transistor coupled between the first node and a ground, a capacitor coupled between the first clock input terminal and the second node and a fourth transistor coupled between the second node and the ground. The third transistor has a gate coupled to a second node. The fourth transistor has a gate coupled to the first node.

Shift register arrays

This invention discloses a fan-out wire structure for use in a display panel of a display device. The fan-out wire structure comprises a first metal layer, a first insulation layer, and a second metal layer. The first insulation layer is formed on the first metal layer and the second metal layer is formed on the first insulation layer, and the first metal layer and the second metal layer are electrically connected by a conductive material, so as to modulate the resistance of the fan-out wire structure by modulating the length of the second metal layer and the conductive material.

Growing community of inventors

Hsin-Chu, Taiwan

Wan-Jung Chen