Skhynix Inc.

Wan Ik Cho

Sang Kyu Lee

Myung Su Kim

Seung Jae Chung

A semiconductor integrated circuit includes a clock pulse generating circuit suitable for outputting a command enable clock pulse when a predetermined command is input during a predetermined command-masking period, a command interface circuit suitable for outputting an internal command signal based on the command enable clock pulse and the command, and a target operating circuit suitable for performing an operation corresponding to the command based on the internal command signal.

Semiconductor integrated circuit

Disclosed are a memory system, a semiconductor memory device and a method of operating the same. The memory system includes: a memory controller to output a command, address and data; and a semiconductor memory device to store at least one page data in each memory cell in response to the command, the address and the data, the memory controller to separately output first address used for determining the at least one page data from the data and second address used for determining a word line coupled to at least one memory cell.

Memory system, semiconductor memory device and operating method thereof

A semiconductor device comprises a memory cell array comprising memory cells coupled to word lines and bit lines, a voltage generator suitable for generating a drive voltage to be applied to a selected word line, and a control logic suitable for detecting the number of pulses of a program voltage received from the memory cell array in a program operation, storing bias information corresponding to the detected number of pulses in a register, and controlling a level of the program voltage for a subsequent program operation based on the bias information.

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Anyang-si, South Korea

Wan Ik Cho