Au Optronics Corporation

Wan-Heng Chang

Hsiao-Wei Cheng

Sung-Yu Su

Chen-Feng Fan

Shih-Chyuan Fan Jiang

Peng-Bo Xi

Hsien-Chun Wang

Rong-Fu Lin

Ya-Jung Wang

Jing-Wun Jhang

A pixel circuit includes a light-emitting device, a first transistor, a second transistor, a first capacitor, a third transistor, a fourth transistor, and a fifth transistor. The first transistor and the fourth transistor are controlled by a light-emitting signal. The third transistor and the fifth transistor are controlled by a scan signal. The light-emitting device, the first transistor, the second transistor, the fourth transistor, and the fifth transistor are serially connected between a system high voltage and a system low voltage. The third transistor is coupled between a data signal and a control terminal of the first transistor. The first capacitor is coupled between a control terminal and a downstream terminal of the second transistor. The fifth transistor is coupled between the downstream terminal of the second transistor and a charging reference voltage. A current of the charging reference voltage is less than a current of the system low voltage.

Pixel circuit

A pixel circuit includes a storage capacitor, a first switch, and a second switch. The first switch is electrically connected to a first end of the storage capacitor, and configured to provide a data voltage to the first end of the storage capacitor according to a gate signal. The second switch is electrically connected between the first end of the storage capacitor and a second end of the storage capacitor, and configured to receive a first operating voltage from the second end of the storage capacitor and provide the first operating voltage to the first end of the storage capacitor.

Pixel circuit and display device

A liquid crystal display panel includes first and second substrates, first pixel electrodes, second pixel electrodes, common electrodes, first auxiliary electrodes, and a liquid crystal layer. The second substrate is disposed opposite to the first substrate. The liquid crystal layer is disposed between the first and the second substrates. The first pixel electrodes, the second pixel electrodes, and the common electrodes are disposed on the first substrate. The first auxiliary electrodes are disposed on the second substrate. One of the first pixel electrodes is not overlapping one of the first auxiliary electrodes in a vertical projection direction and overlapping one of the common electrodes in the vertical projection direction. A driving method of the liquid crystal display panel includes setting a first voltage difference in a wide viewing mode and a second voltage difference in a narrow viewing mode between the first auxiliary electrodes and the common electrodes.

Liquid crystal display panel and driving method thereof

A liquid crystal display panel includes a first substrate, a second substrate, a third substrate, a pixel electrode layer, a first common electrode layer, a first control electrode layer, a first liquid crystal layer, a second common electrode layer, a second control electrode layer and a second liquid crystal layer. The second substrate is opposite to the first substrate. The third substrate is opposite to the second substrate. The pixel electrode layer and the first common electrode layer are disposed on the first substrate. The first control electrode layer is disposed on the second substrate. The first liquid crystal layer is disposed between the first substrate and the second substrate. The second common electrode layer is disposed on the second substrate. The second control electrode layer is disposed on the third substrate. The second liquid crystal layer is disposed between the second substrate and the third substrate.

Liquid crystal display panel

A liquid crystal display panel including first and second substrates, a sub-pixel row, first and second control electrodes is provided. The sub-pixel row is disposed on the first substrate and includes first, second and third sub-pixels arranged in sequence along a first direction, the polarity of the first sub-pixel and the polarity of third sub-pixel are the same, the polarity of the second sub-pixel is different from the polarities of the first and third sub-pixels, each of the first to third sub-pixels has a first region and a second region arranged along a second direction, and includes an electrode having a first slit pattern and a second slit pattern respectively located in the first region and the second region, wherein the extending direction of the first slit pattern is different from that of the second slit pattern, and the extending directions of the first slit patterns of two adjacent electrodes are different. The first and second control electrodes having different polarities are disposed on the second substrate and respectively overlap the first and the second regions.

Liquid crystal display panel comprising first, second, and third sub-pixels and first and second control electrodes having different polarities

A liquid crystal display panel includes first and second substrates, first pixel electrodes, second pixel electrodes, common electrodes, first auxiliary electrodes, and a liquid crystal layer. The second substrate is disposed opposite to the first substrate. The liquid crystal layer is disposed between the first and the second substrates. The first pixel electrodes, the second pixel electrodes, and the common electrodes are disposed on the first substrate. The first auxiliary electrodes are disposed on the second substrate. One of the first pixel electrodes is not overlapping one of the first auxiliary electrodes in a vertical projection direction. A driving method of the liquid crystal display panel includes setting a first voltage difference in a wide viewing mode and a second voltage difference in a narrow viewing mode between the first auxiliary electrodes and the common electrodes and, respectively. The first voltage difference is less than the second voltage difference.

A Fringe-Field Switching (FFS) mode liquid crystal display (LCD) panel with optimized designs of pixel areas and/or liquid crystal materials is provided. The FFS mode LCD panel includes an active-element array substrate with a plurality of pixel areas, an opposite substrate, and a liquid crystal layer. Each pixel area comprises a plurality of first common electrodes, a second common electrode between the pixel area and another horizontally adjacent pixel area, and a pixel electrode. The optical transmittance and homogeneity of the pixel area of the display panel are modified by manipulating the relative position of the electrodes in the pixel areas on the active-element array substrate and/or adopting specific parameters of liquid crystal materials in the liquid crystal layer of the display panel.

Fringe-field switching mode liquid crystal display panel

A pixel structure disposed on a first substrate is provided. The pixel structure includes a scan line, a data line, an active component, a pixel electrode, a first dielectric layer, a common electrode, and a protrusion. The scan line and the data line are disposed on the first substrate. The pixel electrode is disposed on the first substrate. The first dielectric layer is disposed on the first substrate and covers the pixel electrode. The common electrode is disposed on the first dielectric layer, and the common electrode has at least two first branched electrodes and a first opening between the first branched electrodes. The first branched electrodes and the first opening on the first substrate overlap with the pixel electrode in a projection direction. The protrusion is disposed on the first dielectric layer, and the protrusion is disposed in the first opening between the first branched electrodes.

Pixel structure and display panel

Fringe field switching mode liquid crystal display panel

An array substrate includes a scan line, a data line, a thin film transistor, a first transparent electrode, a passivation layer, and a second transparent electrode. The scan line and the data line interlace to define a pixel region. The gate dielectric layer of the thin film transistor overlaps the scan line and the data line and extends to cover the pixel region. The gate dielectric layer has a first region, a second region, and a third region. The first region corresponds to the semiconductor layer of the thin film transistor. The second region connects the first region and the third region. The thickness of the second region is different from that of the third region. The first transparent electrode covers the gate dielectric layer in the pixel region. The passivation layer covers the thin film transistor and the first transparent electrode. The second transparent electrode covers the passivation layer.

Growing community of inventors

Hsin-Chu, Taiwan

Wan-Heng Chang