Sun Microsystems, Inc.

Hewlett Packard Enterprise Development LP

Walter Timothy Nixon

Whay Sing Lee

Fay Chong, Jr

Chia Y Wu

John D Acton

Examples disclosed herein relate to averaging modules. For example, a method may include obtaining, by an analog-to-digital converter (ADC), a plurality of samples of an input analog signal. The method may also include determining, by an averaging module, a sum value of the plurality of samples, such that a set of most significant bits of the sum value represent an average value of the plurality of samples. The method may further include determining the average value based at least on the set of most significant bits, and outputting the average value to a bus coupled to a memory module.

Averaging modules

Broadly speaking, a bandwidth matching device is provided for transforming a number of incoming data streams each having a first bandwidth into an outgoing data stream having a second bandwidth. More specifically, the bandwidth matching device provides an assembler and a disassembler. The assembler incorporates a stepped arrangement of cells for transforming the number of incoming data streams having a given bandwidth into an outgoing data stream having a larger bandwidth, wherein each portion of the outgoing data stream represents a concatenation of a number of portions of each of the incoming data streams. As a complement to the assembler, the disassembler uses a stepped arrangement of cells to transform the concatenated output generated by the assembler back into the number of incoming data streams originally received by the assembler.

Bandwidth matching device and method for operating the same

Broadly speaking, a device for addressing a shared resource is disclosed. The device includes at least one register in communication with the shared resource. The at least one register is configured to hold an address that is to be provided to the shared resource upon receipt of a clock signal. The device also includes a multiplexer for providing a next address to the at least one register. The multiplexer is disposed outside of a critical timing path for addressing the shared resource. The device for addressing the shared resource allows multiple users to be connected to the shared resource without adversely affecting both a speed of the shared resource and a number of users that can be achieved in an actual implementation of the shared resource.

Time slicing device for shared resources and method for operating the same

A method may involve: receiving an even number of odd-sized packets for transmission over a double data rate link; re-packetizing the even number of odd-sized packets into several even-sized packets; transmitting the even-sized packets over the double data rate link; and de-packetizing the even-sized packets to reform the even number of odd-sized packets. Re-packetizing may involve dividing each of the even number of odd-sized packets into an even-sized portion and a remaining portion. Each even-sized portion may be transferred as one of the even-sized packets. The remaining portions of each of the even number of odd-sized packets may be combined to form another one of even-sized packets. De-packetizing may involve associating each of several portions of one of the even-sized packets with a respective other one of the even-sized packets.

Transmitting odd-sized packets over a double data rate link

Broadly speaking, an apparatus for efficiently utilizing a shared packet buffer memory in a switch and a method for operating the same is provided. More specifically, the apparatus includes a memory having a number of buffers configured to be operated in a ratcheted manner. The ratcheted manner in which the memory is operated causes each incoming data stream to be distributed across the number of buffers. Each stored data stream can also be retrieved from the number of buffers for output from the memory in a similar ratcheted manner. The memory uses a rotating selector to control the ratcheted manner of operation. Also, the memory is capable of simultaneously servicing each of a number of inputs and a number of outputs to which the memory is connected.

Efficient utilization of shared buffer memory and method for operating the same

A method may involve: receiving a request to perform a block write to a target device and data associated with the block write; buffering the data associated with the block write prior to completing the block write to the target device; storing an indication identifying a block address range of the block write; receiving a request to perform a read to the target device; and determining whether an address of the read is within the block address range of the block write identified by the indication. In some embodiments, such a method may allow the read to complete ahead of the block write dependent on whether the address of the read is within the block address range of the block write identified by the indication.

Growing community of inventors

Fremont, CA, United States of America

Walter Timothy Nixon