Sprague Electric Company

Cherry Semiconductor Corporation

Stmicroelectronics Gmbh

Sgs-Thomson Microelectronics Limited

Cherry Semiconconductor Corporation

Walter S Gontowski, Jr

Edward Chalfin

James F Mayrand

John G Metro

George E Rollins

Steven S Yole

An amplifier may include an output stage including first and second output transistors, and a biasing stage for generating first and second biasing voltages at control terminals of the first and second output transistors, respectively, based upon a supply voltage and an input signal of the amplifier. The amplifier may also include a clamping stage having first and second clamping transistors for clamping outputs of the first and second output transistors to upper and lower clamping voltages, respectively. Additionally, the amplifier may also advantageously include a saturation detector connected to the clamping stage for providing a saturation signal for at least one of (a) the output of the first output transistor being clamped to the upper clamping voltage, and (b) the output of the second output transistor being clamped to the lower clamping voltage.

Disk drive and error amplifier therefor and related methods

A motor control circuit wherein Bemf zero crossings are sensed to provide phasing information. To avoid incorrect timing (due to detection of zero crossings which may be caused by switching noise when the power transistors switch to commutate other phases), the Bemf detection is masked. Advantageously, the Bemf detection is masked not only for the normal masking period (including an additional percentage beyond the minimum period), but is also for an additional period, if the Bemf output is not of the expected polarity.

Sensorless motor driver with BEMF mask extender

An amplifier in which a clamping circuit is an integral part of the output stage structure is used as a voice coil driver for positioning the heads of a memory disk drive. The output stage, operating in class AB, comprises two bipolar transistors, the source and the sink transistors, serially connected between a power supply and a ground terminal, the serial connection between the emitter of the first transistor and the collector of the second transistor being the output terminal of the output stage. The base terminals of the two output transistors are connected to a bias circuit and to an input transistor, used as the signal control element. The clamping circuit is directly connected with the base terminals of the output transistors to limit the voltage on said base terminals between a first and a second voltage reference.

Amplifier output clamping scheme

A motor control circuit, including a filter amplifier which includes a clamping circuit to limit the maximum voltage of the filter amplifier. The filter amplifier is clamped to essentially the same level as the following error amplifier, which drives the power transistor which drives the motor. Thus, the requisite control voltage is normally present anyway (since this voltage is used to limit the amount of maximum current in the motor). Since the corresponding level of current is selected to ensure adequate current during start up, this signal is therefore appropriate to limit the output voltage of the filter amplifier. This improvement adds very little circuit complexity, and reduces the settling time of the motor controller at startup.

Motor control with clamped filter output

In the transistor power output stages disclosed herein, short-circuit protection is provided with respect to output terminals through which a reversible motor or other load is to be energized. An output stage connected between the load and one of the supply leads provides current gain for energizing the load at a current level which is a function of the level of drive current provided to the output stage. Drive current is provided only at a first level independently of the voltage at the output terminal and a sensing means provides drive current at an increased level when the voltage at the output terminal is in a normal range, e.g. close to the voltage at the respective supply lead.

Short circuit protection

A pulse width modulated power supply controller is disclosed which is capable of generating synchronization pulses in such a manner that multiple ones of such power supply controllers in a system are synchronized to the controller having the highest oscillation frequency, without requiring one of the controllers to be implemented as a master and the others implemented as slaves. The power supply controller includes two comparators which are coupled to receive the external capacitor voltage. A first comparator enables a fast charging circuit, such as a current source, for increasing the rate at which the capacitor is charged responsive to the capacitor voltage reaching a first threshold; a single-ended or differential synchronization pulse is also generated, and communicated to the first comparators of other power supply controllers in a multiple controller system. The second comparator, which includes hysteresis in its characteristic, turns off the fast charging circuit at the upper threshold and initiates the discharge of the capacitor. Control of the output and masking of the comparators of the controllers is also based on the operation of the first and second comparators.

Synchronizable power supply controller and a system incorporating the

The one-shot multivibrator disclosed herein provides precise timing at high speed by controlling the charging and discharging of a timing capacitor over a voltage swing which is compensated so as to be essentially independent of any temperature-dependent offset voltages such as base-emitter drops.

One-spot multivibrator

In the voltage controlled oscillator disclosed herein, the charging and discharging of a timing capacitor is controlled by a differential input comparator which establishes precisely defined switching thresholds. The comparator input circuit is provided with an internally generated, temperature compensated input bias current which substantially relieves the timing components from providing bias current, thereby facilitating a wide range of operation.

Voltage controlled oscillator

A supply bias circuit in which supply current is provided through a resistor coupled to a timing circuit such that this resistor acts as a low pass filter in conjunction with the timing capacitor. Supply current is passed from the timing current through a second resistor and into logic circuitry. The logic circuitry is further connected to the timing circuitry so that it receives extra current each time the capacitor discharges.

Timing and supply bias circuit using one capacitor

The under voltage lockout circuit disclosed herein is useful in a switching mode power supply of the type which, in operation, powers its own regulator circuitry. The lockout circuit operates to inhibit energization of the power supply, including its own regulator, until a voltage reference is established which can control the operation of a comparator which monitors the supply voltage available to the regulator circuitry.

Under voltage lockout circuit for switching mode power supply

In the voltage controlled current source disclosed herein, temperature compensation is provided by offsetting base emitter voltage drops in a pair of bipolar transistors of complementary conductivity types. The control voltage is applied through a resistor to the emitter of a first transistor connected in common base mode. The base voltage of the first transistor is obtained from the emitter of a transistor of complementary conductivity type, the base of which is connected to a stable voltage source. The collector current of the first transistor is then applied to a current mirror to obtain an output current which is highly proportional to the control voltage.

Voltage controllable current source

An integrated circuit for driving five external signalling components such as four LEDs and a piezo horn. The integrated circuit includes three pairs of series connected transistors, each pair being connected in parallel to one another. Only three terminals are required for controlling the four LEDs and piezo horn.

Multiple function driver circuit

A modulator circuit for providing a modulating signal to the timing circuit in a constant off time current mode controller so as to extend the off time in response to an overload condition. A switch connects the output voltage from a current sense amplifier to the modulator circuit when the current mode controller requests maximum current. An overload condition exists when the voltage from the current sense amplifier exceeds a first threshold. The off time is extended to approach infinity when a second threshold is exceeded.

Over-current timer modulator

A cross-coupled latch circuit in which first and second switching transistors are each connected as a current mirror with a diode. The base of each switching transistor is cross-coupled to the collector of the other switching transistor by a resistor and a diode. The collector of each switching transistor is connected to the voltage source terminal by a resistor. The switching transistors are prevented from saturating in their low states so as to increase switching speed.

Cross-coupled latch

A start-up circuit for a voltage regulator having a first current mirror for providing start-up current and a second current mirror responsive to voltage output from said regulator for turning off said first current mirror when said regulator is close to regulation. The circuitry providing start-up current and the circuitry turning off the start-up current having substantially the same temperature coefficients.

Growing community of inventors

Thompson, CT, United States of America

Walter S Gontowski, Jr