Cypress Semiconductor Corporation

Walter Iandolo

Artur P Balasinski

Yitzhak Gilboa

In one embodiment, a dummy pattern having a plurality of dummy features (e.g., waffles) are employed to help achieve a relatively planar surface by chemical-mechanical planarization (CMP). The dummy features are placed based on a dielectric pattern density of a region of an integrated circuit. The dummy features may be added to the design of the integrated circuit using a one pass or two pass approach. The dummy features in a second pass may be fragmented using an AndNot algorithm, for example.

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Santa Clara, CA, United States of America

Walter Iandolo