Cornell University

Walter H Ku

Pane-Chane Chao

Lester F Eastman

David G Ankri

Peter P Reusens

Richard W Linderman

Paul M Chau

A monolithic high performance processor for computing digital signal processing algorithms based on the Fast Fourier Transform. The monolithic processor employs an array of bit-serial multipliers which cooperate with bit-serial adder/substractors to produce fast results with great precision, with reduced printed-circuit board space, and with low power requirements. The processor uses local asynchronous control and simple interfacing with the host computer. The processor, which is applicable to a broad spectrum of digital signal processing, including digital audio, radar/sonar, seismic and speech processing, operates in a variety of modes which allow the device to perform Fast Fourier Transforms, Inverse Fast Fourier Transforms, windowing, multiplication, Finite Impulse Response filtering, convolution and correlation.

High performance signal processor

A heterojunction transistor doped to form a specially-shaped emitter-base conduction band step or spike is disclosed. The potential barrier is then utilized to accelerate electrons across the base region at the maximum velocity obtainable without scattering electrons to the upper valleys. In this manner the electrons may be transported across the base region virtually without collisions and at a velocity approximately 10 times that of normal electron diffusion across the base region, thus increasing the frequence response of the transistor.

Ballistic heterojunction bipolar transistor

A method of fabricating MESFET devices having a submicron line gate electrode is disclosed. The method includes the formation of a single layer of resist material on a semiconductor surface; formation of a resist cavity through optical lithography, the cavity exposing a selected portion of the semiconductor surface; depositing by way of angled evaporation at least one gate wall within said resist cavity, the gate wall defining a shaped gate cavity; depositing gate electrode material within the gate cavity, and removing the resist material. In one embodiment of the invention the gate wall is removed from the gate electrode material, leaving a free-standing electrode. In another embodiment, the gate wall is a permanent part of the electrode structure.

Fabrication of metal lines for semiconductor devices

A heterojunction transistor doped to form a specially-shaped emitter-base conduction band step or spike is disclosed. The potential barrier is then utilized to accelerate electrons across the base region at the maximum velocity obtainable without scattering electrons to the upper valleys. In this manner the electrons bay be transported across the base region virtually without collisions and at a velocity approximately 10 times that of normal electron diffusion across the base region, thus increasing the frequence response of the transistor.

A method of fabricating MESFET devices having a T-shaped gate electrode is disclosed. The method includes the formation of a single layer of resist material on a semiconductor surface; formation of a resist cavity through optical lithography, the cavity exposing a selected portion of the semiconductor surface; depositing by way of dual-angle evaporation gate walls within said resist cavity, the gate walls defining a T-shaped gate cavity; depositing gate electrode material within the gate cavity, removing the resist material, and removing the gate walls from the gate electrode material.

Growing community of inventors

Ithaca, NY, United States of America

Walter H Ku