Burroughs, Inc.

Walter E Feeser

Mark L Gerhold

Improved means and methods are described for providing microprogramming in a microprogrammed data processor. A separate, relatively fast access Read/Write microinstruction memory is provided which operates as an index-associative cache memory with respect to the processor main memory in a manner which permits a high 'hit' ratio to be obtained for requested microinstructions, while at the same time removing the burden from the programmer of having to be concerned with the loading and/or current contents of the microinstruction memory.

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San Diego, CA, United States of America

Walter E Feeser