Entropic Communications, Inc.

Trident Microsystems (far East) Ltd.

Trident Technologies Corporation

Walter C Lin

Jiande Jiang

Jung-Herng Chang

Kenny Tseng

The present invention provides a system and method for automatically controlling the phase of the clock signal for sampling an HDTV signal, which implements a new and improved method for phase detection. The system and method utilize the standard format of an HDTV signal to consistently ensure accurate phase detection. Particularly, the system and method detect the target phase for the sampling clock using a tri-level sync pattern that exists at the beginning of each display line. This tri-level sync pattern or 'sync pulse' is well suited for phase detection since it includes several static areas separated by substantial transitions. Furthermore, by using the sync pulse of the HDTV signal, the system and method provide consistent and accurate results, since the sync pulse will not change regardless of the whether the video data is static or in motion.

System and method for automatically controlling the phase of a clock signal for sampling an HDTV signal

A method and system for frame insertion in a digital display system is provided. The method is adapted for use with a liquid crystal display (LCD) type display and is effective to substantially reduce motion blur. The LCD display receives a sequence of digitized input frames at a first frequency. The method generates a sequence of output frames that include the digitized input frames interspersed with a plurality of modified frames. Each of the modified frames is substantially similar to a preceding digitized input frame, but has a reduced luminance. The modified frames may be generated by multiplying a preceding digitized input frame by a reduced luminance factor. The reduced luminance factor may be determined as a fixed value or as a function of an average pixel level of a preceding frame.

Method and system for frame insertion in a digital display system

The present invention provides a system and method for adjusting clock phase in a digital display. The displaymay include a target analog-to-digital converterthat generates a first digital signal based on an analog input signal and a first clock signal (CLK). The systemincludes a first clock phase adjustment circuit, which provides CLKto the target analog-to-digital converter. A second analog-to-digital converterreceives at least a portion of the analog input signal and a second adjusted clock signal (CLK), and generates a second digital signal based on these inputs. A second clock phase adjustment circuitis communicatively coupled to the second analog-to-digital converter, and transmits CLKto the second analog-to-digital converter. A controllerreceives the second digital signal from the second analog-to-digital converterand uses the signal to determine a preferred phase of CLK. The controllerthen causes the first clock phase adjustment circuit to adjust the phase of CLKbased on the preferred phase.

System and method for automatically adjusting the clock phase of a display in real-time

Method and apparatus by which digital data is communicated from a computer system to a display device. An analog video signal received from a computer system includes a predetermined data pattern. The analog video signal is sampled to detect the predetermined data pattern. The digital data is then recovered from the detected predetermined data pattern. The predetermined data pattern may occur a predetermined time interval after a horizontal sync pulse or may occur outside of a blanking interval. The display device may respond to the predetermined data pattern by commencing a set-up process, such as, adjusting a sampling rate for sampling the analog video signal; adjusting a sampling phase; or adjusting an orientation of a display image for the display device. Adjusting an orientation may comprise adjusting a sampling start time relative to a horizontal or vertical sync pulse. The predetermined data pattern may be representative of a parameter of the analog video signal, such as, resolution or frequency. The predetermined data pattern may be representative of a beginning of a horizontal blanking interval relative to a horizontal sync pulse for the analog video signal or representative of a beginning of a vertical blanking interval relative to a vertical sync pulse for the analog video signal. The predetermined data pattern may be utilized for adjusting a horizontal or vertical orientation of a display image for the display device.

Method and apparatus for communicating digital data from a computer system to a display device

The present invention provides a system and method for overlaying video from different video sources on a display device. The sources may include a primary video source that provides first image data in the form of a first video signal, and an overlay video source that provides second image data in the form of a second video signal and a fast blank signal. The system encodes the fast blank signal into the second video signal to form encoded image data. The fast blank signal can occupy one bit of the encoded image data. The system stores the first image data and the encoded image data in a frame buffer. A controller reads the first image data and the encoded image data from the frame buffer. The controller processes and decodes encoded image data, extracting the fast blank signal. The controller then uses the extracted fast blank signal to combine the second image data and the first image data, effective to overlay an image from the overly video source onto an image from the primary video source.

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Santa Clara, CA, United States of America

Walter C Lin