Texas Instruments Corporation

Wallace Edward Matthews

Bradford Lawrence Hunter

David Louis Freeman

John Landau

Bertan Bakkaloglu

Brian Lum-Shue-Chan

Richard David Nicholson

Eric Frank Estes

In some examples, apparatus comprises a multiplexer (MUX) adapted to be coupled to a set of battery cells and configured to provide a voltage of a different battery cell in the set of battery cells based on a MUX control signal. Apparatus comprises a comparator coupled to the MUX and configured to compare a MUX output signal to a threshold voltage to provide a comparator output signal. Apparatus comprises a digital control circuit configured to provide the MUX control signal to the MUX, to store the comparator output signal, and to use a logic AND gate to provide an AND gate output signal based on the stored comparator output signal.

Multi-cell battery fault indicator

The disclosure presented herein provides example embodiments of systems for accurate multiplexing. The systems and methods presented may be suitable for non-limiting examples of analog to digital conversion with a switched input voltage (for a switched capacitor application) or any circuit with high voltage/high accuracy voltage multiplexing. In an example embodiment, pulsed current sources may be implemented to rapidly turn on and turn off the selected and unselected multiplexer ports while maintaining relatively low power consumption. A Kelvin input port may allow a high voltage input to be accurately sensed by avoiding a voltage drop associated with a selected pass gate p-channel FET channel resistance and parasitic wire resistance. The Kelvin input port biases the gate of a pass FET structure whose body terminals are allowed to remain floating.

Systems for accurate multiplexing

The disclosed systems and methods of low offset switched capacitor comparator reduce settling errors. The system operates in two major phases. During a first phase, the input voltage is sampled on the input capacitors and a differential amplifier is configured in a unity gain configuration to sample the amplifier offset. During the second phase, the input voltage difference is amplified at the output of the comparator. The amplifier transient sampling error is reduced by shorting the outputs of the differential amplifier for a shorting period at the start of the second phase. A clocked comparator at the output of the differential amplifier provides a fast comparison using internal positive feedback. The differential amplifier should have developed sufficient differential output voltage to overcome the offset of the clocked comparator.

Systems and methods of low offset switched capacitor comparators

A relatively low frequency chopping operation is applied to a delta-sigma ADC to reduce DC offsets resulting from non-ideal component operation. Sequential chopping takes place outside a closed loop and may include an inverted polarity feedback for a part of the chopping period. Nested chopping involves chopping within the closed loop, and may include an inverted polarity feedback and a time shift. The feedback compensation for sequential and nested chopping permits the correct polarity feedback to be provided at the desired time in conjunction with sampling and quantization events. Integrating capacitor(s) may be swapped in relative polarity during nested chopping to preserve residual conversion information for the desired polarity. The ADC operation is non-temperature dependent and avoids modification to the useful signal, resulting in higher accuracy.

Multistage chopper stabilized delta-sigma ADC with reduced offset

A battery detect circuit ( ) is provided that is operable to dispose a sense resistor ( ) in series with the battery to determine whether the charge is being provided to the battery or being extracted from the battery. The voltage across the sensor resistor ( ) is sensed by a voltage/frequency converter ( ). The voltage/frequency converter ( ) is a differential structure comprised of two integrator structures ( ) and ( ) that are operable to utilize a switched capacitor configuration to drive comparators on the output thereof. Each of the integrator structures ( ) and ( ) has associated therewith passive elements and active elements. The integrators ( ) and ( ) have associated therewith integration capacitors ( ) and ( ). Additionally, there are two operational amplifiers ( ) and ( ) that provide the active components of each of the integrators ( ) and ( ). The various switched capacitor circuits ( ) and ( ) associated with the amplifiers ( ) and ( ) are provided to provide the integration operation. Both the amplifiers ( ) and ( ) and their associated switched capacitor circuits ( ) and ( ) are dynamically balanced such that they are switched between integrator ( ) and integrator ( ) on a periodic basis. This therefore allows the errors between the active and passive elements to be switched between the two integrators ( ) and ( ) such that no accumulative error occurs.

Battery pack with monitoring function utilizing association with a battery charging system

A battery charging system is provided which is comprised of a battery pack ( ) and a charging system ( ). The battery pack ( ) includes a battery ( ) and a battery capacity detect circuit ( ). The battery capacity detect circuit ( ) having a memory is interfaced with the charging system ( ) through a communication link to output a CHG-Bar signal. The battery capacity detect circuit ( ) is operable to perform numerous monitoring operations on the battery by detecting the charge input to the battery and detecting charge taken away from the battery in a discharge operation. This operation is performed independent of the charging operation by the charging system ( ). However, the charging operation of the charger ( ) can be affected with the CHG-Bar signal.

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Austin, TX, United States of America

Wallace Edward Matthews