Qorvo US, Inc.

Walid M Meliane

Tarak A Railkar

Kevin J Anderson

Dylan Murdock

Christo Pavel Bojkov

Michael Roberg

John Beall

Terry Hon

Michael Arnold

Matthew Essar

Binh K Le

Semiconductor devices, and more particularly arrangements of fluorinated polymers with low dielectric loss for environmental protection in semiconductor devices are disclosed. Arrangements include conformal coatings or layers of fluorinated polymers that cover a semiconductor die on a package substrate of a semiconductor device. Such fluorinated polymer arrangements may also conformally coat various electrical connections for the semiconductor die, including wire bonds. Fluorinated polymers with low dielectric constants and low moisture permeability may thereby provide reduced moisture ingress in semiconductor devices while also reducing the impact of associated dielectric loss.

Fluorinated polymers with low dielectric loss for environmental protection in semiconductor devices

The present disclosure relates to a microelectronic package, which includes a base substrate, a perimeter wall, an electronic component, and a mold compound. The perimeter wall extends from a periphery of the base substrate to form a cavity that is over the base substrate and within the perimeter wall. The electronic component is mounted on the base substrate and exposed to the cavity. The electronic component is thermally coupled to a thermal management component, which extends through the base substrate and conducts heat generated from the electronic component. The electronic component is also electrically coupled to a wall signal via, which extends through the perimeter wall and transmits signals. The mold compound resides over the base substrate and within the cavity, so as to encapsulate the electronic component.

Laminate-based package with internal overmold

The present disclosure relates to an air-cavity package, which includes a bottom substrate, a top substrate, a perimeter wall, a bottom electronic component, a top electronic component, and an external electronic component. The perimeter wall extends from a periphery of a lower side of the top substrate to a periphery of an upper side of the bottom substrate to form a cavity. The bottom electronic component is mounted on the upper side of the bottom substrate and exposed to the cavity. The top electronic component is mounted on the lower side of the top substrate and exposed to the cavity. And the external electronic component is mounted on an upper side of the top substrate, which is opposite the lower side of the top substrate and not exposed to the cavity.

Air-cavity package with enhanced package integration level and thermal performance

Embodiments described herein relate generally to a microelectronic packaging and the manufacture thereof. A carrier may have a die attached to a top face thereof. A printed circuit board may be attached to the top face of the carrier. The printed circuit board may have a hole in which the die is disposed. A lid may be attached to the printed circuit board opposite the carrier so that the die is enclosed by the carrier, the printed circuit board, and the lid. The printed circuit board may form a seal ring around the die. Other embodiments may be described and/or claimed.

Modular semiconductor package

The present disclosure relates to an air-cavity package, which includes a bottom substrate with a first heat dissipation interface, a top substrate with a second heat dissipation interface, a perimeter wall, a bottom electronic component, and a top electronic component. The perimeter wall extends between a periphery of the top substrate and a periphery of the bottom substrate to form a cavity. The bottom electronic component is mounted on the bottom substrate, exposed to the cavity, and thermally coupled to a bottom thermally conductive structure, which extends through the bottom substrate and towards the first heat dissipation interface. The top electronic component is mounted on the top substrate, exposed to the cavity, and thermally coupled to a top thermally conductive structure, which extends through the top substrate and towards the second heat dissipation interface.

Air-cavity package with two heat dissipation interfaces

Embodiments of the present disclosure are directed towards apparatuses, systems, and methods for die attach coatings for semiconductor packages. In one embodiment, a die may be coupled with a substrate by a die attach and a coating may be applied to an edge of the die attach.

Growing community of inventors

Frisco, TX, United States of America

Walid M Meliane