Nanowave Technologies Inc.

Walid Hamdane

Charles William Tremlett Nicholls

Charles William Nicholls

Circuits and methods for identifying or verifying frequencies are disclosed herein. A frequency verification circuit comprises: an input port for receiving an input signal; a phase frequency difference detector for determining a difference in phase and frequency between the input signal and a feedback signal and for providing a control signal based on the detected difference; a voltage controlled crystal oscillator for producing an output signal based on the control signal; and a feedback loop including a feedback divider for frequency dividing the output signal by a factor R to produce the feedback signal, the feedback divider being programmable to a plurality of values of the factor R to correspond to a plurality of different test frequencies.

Frequency determination circuit and method

A digitally compensated phase locked oscillator (DCPLO) is disclosed herein. The DCPLO comprises: a DCPLO input for receiving a reference signal at a known frequency; a DCPLO output for outputting a signal at a desired frequency; a phased locked loop (PLL), the phased locked loop comprising: a phase frequency detector, an oscillator, and a PLL output coupled to the output; a first direct digital synthesizer (DDS), the first DDS having an output coupled to the PLL to supply a DDS signal to the PLL for adjusting the frequency within the PLL so as to maintain phase lock over the operating temperature; a temperature sensor; and a processor coupled to the first DDS, the phase frequency detector, and the temperature sensor, the processor configured to set the frequency of the first DDS according to a temperature sensed by the temperature sensor.

Digitally compensated phase locked oscillator

An offset phase locked loop synthesizer comprising: an input; an output; a voltage controlled oscillator (VCO), the VCO output coupled to the synthesizer output; a phase frequency detector having a reference input, a feed-back input, and an output; a mixer having a first mixer input coupled to the synthesizer input and a second mixer input coupled to the VCO output; a first divider for frequency dividing a signal by a first value and having an input coupled to the mixer output and an output coupled to the second input of the phase frequency detector; a second divider for frequency dividing a signal by a second value and having an input coupled to the synthesizer input and an output coupled to the reference input of the phase frequency detector; and a low pass filter coupled between the output of the phase frequency detector and the VCO input.

Low spurious synthesizer circuit and method

An apparatus and method for providing an output signal. The apparatus comprises an input for receiving a reference signal, an oscillator for providing an output signal, and an offset signal generator for frequency multiplying the reference signal to generate an offset signal that has a plurality of frequency products in a plurality of frequency bands. The apparatus further includes a mixer for mixing the offset signal with the output signal to produce a combined signal, an offset frequency selector for controllably selecting a frequency band of the offset signal, and a difference detector for detecting a difference between the reference signal and the combined signal and for providing a control signal to the oscillator based on the detected difference.

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Ottawa, Canada

Walid Hamdane