Psemi Corporation

Murata Manufacturing Co., Ltd.

Walid Fouad Mohamed Aboueldahab

Aichen Low

Gregory Szczeszynski

Circuit embodiments for a switched-capacitor power converter, and/or methods of operation of such a converter, that robustly deal with various startup scenarios, are efficient and low cost, and have quick startup times to steady-state converter operation. Embodiments prevent full charge pump capacitor discharge during shutdown of a converter and/or rebalance charge pump capacitors during a startup period before switching operation by discharging and/or precharging the charge pump capacitors. Embodiments may include a dedicated rebalancer circuit that includes a voltage sensing circuit coupled to an output voltage of a converter, and a balance circuit configured to charge or discharge each charge pump capacitor towards a target steady-state multiple of the output voltage of the converter as a function of an output signal from the voltage sensing circuit indicative of the output voltage. Embodiments prevent or limit current in-rush to a converter during a startup state.

Startup of switched capacitor step-down power converter

Circuits/methods for controlling the startup of multiple parallel power converters that avoid inrush current or switch overstress in an added power converter or a power converter having fault conditions. Embodiments include node status detectors coupled to nodes within parallel-connected power converters to monitor voltage/current and configured in some embodiments to work in parallel with an output status detector measuring the startup output voltage of a power converter. With charge pump-based power converters, the node status detectors ensure that the power converter pump capacitors are charged while the output capacitor is charged as well. For such embodiments, a soft-start period of startup may be considered finished if both the shared output capacitors and the power converter pump capacitors are charged to target values. Embodiments may also be used for fault detection during steady-state operation.

Startup detection for parallel power converters

Circuits/methods for controlling the startup of multiple parallel power converters that avoid inrush current or switch overstress in an added power converter or a power converter having fault conditions. Embodiments include node status detectors coupled to nodes within parallel-connected power converters to monitor voltage/current and configured in some embodiments to work in parallel with an output status detector measuring the startup output voltage of a power converter. With charge pump-based power converters, the node status detectors ensure that the power converter pump capacitors are charged while the output capacitor is charged as well. For such embodiments, a softstart period of startup may be considered finished if both the shared output capacitors and the power converter pump capacitors are charged to target values. Embodiments may also be used for fault detection during steady-state operation.

A single integrated circuit DC-to-DC conversion solution that can be used in conjunction with product designs requiring at least two different DC-to-DC conversion ratios, and in particular both divide-by-2 and divide-by-3 DC-to-DC buck conversion ratios or both multiply-by-2 and multiply-by-3 DC-to-DC boost conversion ratios. Embodiments are reconfigurable between a first Dickson converter configuration that includes at least two non-parallel capacitors (any of which may be off-chip) and associated controlled multi-phase switching to achieve a first conversion ratio, and a second Dickson converter configuration that includes a lesser equivalent number of capacitors than the first circuit configuration (which may be accomplished by parallelizing at least two non-parallel capacitors of the first configuration) and associated controlled multi-phase switching to achieve a second conversion ratio different from the first conversion ratio.

Selectable conversion ratio DC-DC converter

Over-current detection circuits and methods for adiabatic power converters that provide numerous advantages over known solutions, including simple digital control, enabling trimming to be done in the low voltage domain, and avoidance of high-voltage sense current mirrors. Embodiments include a slope detector circuit configured to measure a slope of the immediate output voltage Vof an adiabatic power converter during a charge pump clock cycle, compare the measured slope to a pre-determined value representing a slope of an over-current condition, and assert a flag if comparison indicates an over-current condition. An auto-calibration circuit may be included which presents a set of known loads across the output of an adiabatic power converter at device startup, measures the resulting counts from the slope detector counter, and extrapolates to a count that corresponds to a maximum allowed current.

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Wokingham, United Kingdom

Walid Fouad Mohamed Aboueldahab