Stmicroelectronics Asia Pacific Pte Limited

Stmicroelectronics (alps) Sas

Wai Yin Hnin

Lookah Chua

Hong Chean Choo

Céline Mas

Hongliang Zhang

An electronic device includes a pixel array having a plurality of rows with active imaging pixels, and at least one row with test pixels. Each of the test pixels includes a test voltage generation circuit generating a test voltage, a switching circuit receiving the test voltage and an image pixel output signal and passing the test voltage as output when in a test mode, a comparison circuit receiving the output from the switching circuit and an analog to digital conversion signal and asserting a counter reset signal when the output from the switching circuit and the analog to digital conversion signal are equal in voltage, and a counter beginning counting at a beginning of each test cycle within the test mode, stopping counting upon assertion of the counter reset signal, and outputting its count upon stopping counting. The count is proportional to the test voltage when in the test mode.

Image sensors for advanced driver assistance systems utilizing regulator voltage verification circuitry to detect malfunctions

An electronic device includes a test voltage generation circuit to generate a test voltage as a function of a regulator voltage, and a switching circuit to receive the test voltage and an image pixel output signal, and to pass the test voltage as output when in a test mode. A comparison circuit receives the output from the switching circuit and an analog to digital conversion signal, and asserts a counter reset signal when the output from the switching circuit and the analog to digital conversion signal are equal in voltage. A counter begins counting at a beginning of each test cycle within the test mode, stops counting upon assertion of the counter rest signal, and outputs its count upon stopping counting. The count is proportional to the test voltage when in the test mode.

In an embodiment, an image sensor includes: first and second voltage rails; first and second regulators configured to generate first and second regulated voltage at the first and second voltage rails, respectively; and a plurality of pixels coupled to the first and second voltage rails. Each pixel includes: first and second transistor coupled first and second storage capacitor, respectively. A third transistor is coupled between a control terminal of the first transistor and the first or second voltage rails. The third transistor is configured to limit a slew rate of current flowing between the control terminal of the second transistor and the first or second voltage rails to a first slew rate when the image sensor operates in global shutter mode, and to a second slew rate when the image sensor operates in rolling mode, the first slew rate being smaller than the second slew rate.

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Singapore, Singapore

Wai Yin Hnin