Freescale Semiconductor,inc.

Motorola Corporation

Wai Wong Chow

Man Hon Cheng

Hei Ming Shiu

Wai Keung Ho

Clem H Brown

Qing-Chun He

Zhi-Gang Bai

Nan Xu

Frank J Mosna, Jr

Fei Ying Wong

Kam Fai Lee

A semiconductor device () includes a first leadframe () having a perimeter () that defines a cavity () and leads () extending inwardly from the perimeter, and a second leadframe () having top and bottom surfaces and a die paddle surrounding a die receiving area (). An integrated circuit () is placed within the die receiving area of the second leadframe. The IC has bonding pads () located on a peripheral portion of its top surface. The second leadframe and the IC are in facing relation with the first leadframe such that the leads of the first leadframe are electrically connected to respective ones of the bonding pads. A mold compound () is injected between the first and second leadframes and covers the second leadframe top surface and a central area of the first surface of the IC. At least the bottom surfaces of the leads are exposed.

Flipchip QFN package

A method of packaging an integrated circuit die () includes the steps of forming an array of soft conductive balls () in a fixture () and flattening opposing sides of the balls. The flattened balls are then transferred from the fixture to a mold masking tape (). A first side of the IC die is attached to the balls with a die attach adhesive () and then wire bonding pads () on the die are electrically connected directly to respective balls with wires (). An encapsulant () is formed over the die, the electrical connections, and a top portion of the formed balls. The tape is removed and adjacent, encapsulated dice are separated via saw singulation. The result is an encapsulated IC having a bottom side with exposed balls.

Method of forming land grid array packaged device

A leadframe () for a semiconductor device includes a first leadframe portion () having a perimeter that defines a cavity () and a plurality of leads () extending inwardly from the perimeter and a first thickness. A second leadframe portion () is attached to the first leadframe portion (). The second leadframe portion () has a die paddle () received within the cavity () of the first leadframe portion (). The second leadframe portion () has a second thickness that is greater than a thickness of the first leadframe portion (). Such a dual gauge leadframe is suitable especially for high power devices in which the die paddle acts as a heat sink.

Method for making dual gauge leadframe

An image sensor device includes a QFN type leadframe having a central die attach flag and an outer bonding pad area having a plurality of bonding pads. A sensor IC is attached to the flag. The IC has a first surface with an active area and a peripheral bonding pad area that includes bonding pads. Wires are wirebonded to respective ones of the IC bonding pads and corresponding ones of the leadframe bonding pads, thereby electrically connecting the IC and the leadframe. Stud bumps are formed on the first surface of the IC and a transparent cover is disposed over the IC active area and resting on the stud bumps. The cover allows light to pass therethrough onto the IC active area. A mold compound is formed over the leadframe, wirebonds and a peripheral portion of the cover.

Optical sensor package

A semiconductor component for electrical coupling to a substrate () includes: a semiconductor chip (); a non-leaded leadframe () including a plurality of electrical contacts () located around a periphery () of the semiconductor chip; a first electrical conductor () electrically coupling together the semiconductor chip and the non-leaded leadframe; and a mold compound () disposed around the semiconductor chip, the first electrical conductor, and the plurality of electrical contacts. At least one electrical contact of the plurality of electrical contacts includes: a first surface () having a first surface area for electrically coupling to the semiconductor chip; and a second surface () opposite the first surface and having a second surface area for electrically coupling to the substrate, where the second surface area is larger than the first surface area.

Semiconductor component having first surface area for electrically coupling to a semiconductor chip and second surface area for electrically coupling to a substrate, and method of manufacturing same

Dual gauge leadframe

An image sensor device includes a first, QFN type leadframe to which a sensor IC is electrically connected. A second leadframe is provided for holding a lens. A third leadframe is positioned between the first and second leadframes to appropriately space the IC from the lens. Multiple sensor devices are assembled at the same time by the use of leadframe panels.

Method of packaging an optical sensor

A semiconductor deviceincludes a base carrier, an adhesive material layerand an integrated circuit die. The base carrierhas a top side and a bottom side, the top side having a central area for receiving the dieand a peripheral area surrounding the central area. The adhesive material layeris disposed on the top side of the base carrier in an 'X' shaped pattern. The 'X' shaped pattern includes two bisecting lines. The two bisecting lines extend well beyond the central area and into the peripheral area of the base carrier top surface. The dieis attached to the base carrierwith the adhesive material layerat the central area. Even after attachment of the die, the adhesive materialextends well beyond the dieand the central area into the peripheral area.

Method of attaching a die to a substrate

Flipchip QFN package and method therefor

A leadframe () for a semiconductor device includes a paddle ring () having an inner perimeter (), an outer perimeter (), and a cavity () located within the inner perimeter () for receiving an integrated circuit die (). A first row of terminals () surrounds the outer perimeter () and a second row of terminals () surrounds the first row of terminals (). Each of the terminals of the first row of terminals () is individually connected to the paddle ring () and each of the terminals of the second row of terminals () is connected to one side of a connection bar (), which is connected to one of the terminals of the first row () or to the paddle ring ().

Multi-row leadframe

A semiconductor device includes a base carrier , an adhesive material layer and an integrated circuit die . The base carrier has a top side and a bottom side, the top side having a central area for receiving the die and a peripheral area surrounding the central area. The adhesive material layer is disposed on the top side of the base carrier in an &ldquo;X&rdquo; shaped pattern. The &ldquo;X&rdquo; shaped pattern includes two bisecting lines. The two bisecting lines extend well beyond the central area and into the peripheral area of the base carrier top surface. The die is attached to the base carrier with the adhesive material layer at the central area. Even after attachment of the die , the adhesive material extends well beyond the die and the central area into the peripheral area.

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Hong Kong, China

Wai Wong Chow