Hong Kong Applied Science and Technology Research Institute Company, Limited

Wai Po Wong

Gang Qian

Shuzuo Lou

Huimin Guo

Yat Tung Lai

Xiaoming Chen

Weimin Zhang

A voltage detector has a diode ladder with one or more diodes connected in series between a battery voltage input and an upper measuring node. A measuring diode is connected between the upper measuring node and a lower measuring node. A resistor and a power-down switch are connected in series between the lower measuring node and a ground. An analog input to an Analog-to-Digital Converter (ADC) is connected by a switch to the upper measuring node to generate an upper digital value. Then the switch connects the analog input to the lower measuring node to generate a lower digital value. The difference between the upper and lower digital values is the diode voltage drop across the measuring diode and is multiplied by a number of diodes in the diode ladder and added to the upper digital value to generate a battery voltage measurement.

Low-power voltage detector for low-voltage CMOS processes

A relaxation oscillator for generating a first and a second oscillation signals, comprising: a reference-voltage providing circuit for providing a high and a low reference voltages; switches for directing the high and low reference voltages to inputs of a transconductance amplifier and a non-inverting input of a comparator; the transconductance amplifier for generating an output current with a value determined by its transconductance value, controlled by an input tuning voltage, and multiplied by its inputs' voltage difference; a capacitor connecting between the transconductance amplifier output and ground; and the comparator for generating a first and a second digital signals; wherein the first and second digital signals are digital control signals to the switches, and the first and second oscillation signal of the relaxation oscillator respectively; wherein the oscillation frequency of the relaxation oscillator is independent of the reference voltages, achieving accurate frequency turning, and simplifying the reference-voltage providing circuit.

Gm-C filter tuning circuit based on relaxation oscillator

A circuit is provided for suppression of second-order intermodulation in a double-balanced mixer circuit. The circuit includes a duplicate transconductor element for duplicating AC current in a transconductor pair of the double-balanced mixer circuit. A fundamental cancellation element cancels a fundamental component of an AC current of the duplicate transconductor element, while preserving a second-order intermodulation component. A phase inversion element feeds an output current of the fundamental cancellation element to the transconductor pair of the double-balanced mixer circuit, to substantially remove the second-order intermodulation component from a differential output of the double-balanced mixer circuit.

Current-matching intermodulation suppression

There is provided an integrated circuit having a programmable gain amplifier and an embedded filter. The programmable gain amplifier and the filter comprise a gain element having an inverting input for receiving an input and a feedback signal, a non-inverting input coupled to ground, and an output. The gain element also has one or more feedback loops coupling the output of the gain element to the inverting input of the gain element. Each feedback loop has a switch coupled in series with at least one passive component. Each switch has a first state to connect the corresponding feedback loop and a second state to disconnect the corresponding feedback loop. Each switch is programmatically configurable to provide a first gain and a first bandwidth and a second gain and a second bandwidth such that the first bandwidth is substantially equal to the second bandwidth.

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Hong Kong, China

Wai Po Wong