Analog Devices,inc.

Wai L Lee

Paul F Ferguson, Jr

Tom W Kwan

Norman D Grant

A switched-capacitor circuit that includes a first signal path disposed between a first input node and a first output node, and a second signal path disposed between a second input node and a second output node. The first and second switches can be alternately disposed within the first and second signal paths. An amplifier responsive to the switches can be provided, and its offset can be cancelled. The outputs of the amplifiers can be maintained, and this can involve buffering.

Switched capacitor offset suppression

A digital filtering method that includes sampling an input signal at a first rate, integrating the signal, sampling the integrated version at a different rate, and combining the sampled integrated version with the input signal. The method can include again integrating the integrated version, sampling the twice integrated version at a third rate different from the first and second rates, and combining the twice integrated version with the integrated version and the input signal. The integrated version can be again integrated, the twice integrated version can be sampled at a third rate different from the first and second rates, and the twice integrated version can be combined with the integrated version. A common circuit component can be multiplexed to participate in two integrating steps.

Multi-rate IIR decimation and interpolation filters

A computed tomography imaging method includes receiving an analog beam intensity signal from a computed tomography scanner and converting the signal into a series of digital representations of the signal at successive points in time using a predetermined sample rate. Indications that a portion of the scanner has reached a certain position relative to the beam are received asynchronously with respect to the sample rate. The value of at least one of the digital representations is adjusted in response to the indications to obtain a corrected digital representation of the analog signal.

Data acquisition system for computed tomography scanning and related

A circuit that provides samples of in-phase and quadrature components of an input waveform includes an oversampling ADC that receives the input waveform and converts the input waveform to digital samples at an oversampling rate. A first digital filter, coupled to the ADC, receives the digital samples from the ADC and provides the in-phase component samples of the input waveform. A second digital filter, coupled to the ADC, receives the digital samples from the ADC and provides the quadrature component samples of the input waveform.

In-phase and quadrature sampling circuit

A biquad switched capacitor filter is preferably utilized as the output filter in a sigma delta digital-to-analog converter. The switched capacitor filter uses a cross-coupled switched capacitor circuit which delivers charge to the capacitors on both phases of the clock. As a result, the sizes of the capacitors can be reduced by a factor of two, while delivering the same charge as a single sampling circuit. By using the cross-coupled switching circuit everywhere in the filter, the sensitivity to capacitor mismatches is substantially reduced. The clock phases applied to the stages of the filter are alternated so that there is a one clock cycle delay around each loop containing two filter stages, thereby insuring the stability of the filter.

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Wilmington, MA, United States of America

Wai L Lee