Mosaid Technologies Corporation

Soma Networks, Inc.

Other

W Martin Snelgrove

Duncan George Elliott

Ramesh Mantha

Mark J Frazer

Frank Van Heeswyk

Frank Kschischang

Duncan G Elliott

A method of operating a digital computer includes the steps of addressing a memory, reading a row of data from the memory, providing the same computational instruction simultaneously to each processor element of a plurality of processor elements, where each of the processor elements is selectively coupled to a corresponding bit position of the memory row of data, performing the same computational operation on a selected plurality of data bits in parallel, and writing the result into the memory at the same row as the data was read from.

Method and apparatus for an energy efficient operation of multiple processors in a memory

A communication structure and method which allows connection-like and connectionless communications to be provided on a multiplexed link is provided. The structure and method can make efficient use of available transmission capacity and/or network resources while providing for both types of communication. Connection-like communications can be provided by a channel having allocated bandwidth dedicated to the communication while connectionless communication can be provided by a shared channel through which data can be transmitted to subscribers. In an embodiment, the shared channel transmits frames of packets addressed to one or more of the subscribers. The frames can have a robustly packaged header that can be received by all subscriber stations serviced by the base station while payload data in the frame can be packaged with a level of robustness appropriate for the intended subscriber station. Different packagings can include different encoding and/or modulation of the payload data. The allocation of bandwidth between the dedicated channels and the broadcast channel can be fixed, or can be managed to meet network or network operator requirements. The structure and method can also be managed by the network operator to permit prioritization of some communications over others. In another embodiment, two or more shared channels are provided. In another embodiment, dedicated channels can be created with different amounts of bandwidth and/or can employ modulation and/or encoding selected according to the reception-quality of the recipient subscriber station.

Communication structure with channels configured responsive to reception quality

A communication structure and method which allows connection-like and connectionless communications to be provided on a multiplexed link is provided. The structure and method can make efficient use of available transmission capacity and/or network resources while providing both types of communication and hybrids. Connection-like communications can be provided by a channel having allocated transmission capacity dedicated to the communication while connectionless communication can be provided by a shared channel through which data can be transmitted to subscribers. In an embodiment, the shared channel transmits frames of packets addressed to one or more of the subscribers. The allocation of transmission capacity between the dedicated channels and the shared channel can be fixed, or can be managed to meet network or network operator requirements. The structure and method can also be managed by the network operator to permit prioritization of some communications over others. In another embodiment, two or more shared channels are provided.

Communication structure for multiplexed links

A method of operating a digital computer includes the steps of addressing a memory, reading a row of data from the memory, providing the same computational instruction simultaneously to each processor element of a plurality of processor elements, where each of the processor elements is selectively coupled to a corresponding bit position of the memory row of data, performing the same computational operation on a selected plurality of data bits in parallel, and writing the result into the memory at the same row from which the data was read.

A digital computer performs read-modify-write (RMW) processing on each bit of a row of memory in parallel, in one operation cycle, comprising: (a) addressing a memory, (b) reading each bit of a row of data from the memory in parallel, (c) performing the same computational operation on each bit of the data in parallel, using an arithmetic logic unit (ALU) in a dedicated processing element, and (d) writing the result of the operation back into the original memory location for each bit in the row.

Memory device with multiple processors having parallel access to the same memory area

A random access memory chip comprising static random access storage elements, word lines and bit lines connected to the storage elements, a sense amplifier connected to each of the bit lines, a separate processor element connected to each of the sense amplifiers, apparatus for addressing a word line, and apparatus for applying a single instruction to the processor elements, whereby the instructed processor elements are enabled to carry out a processing instruction in parallel on separate bits stored in the storage elements of the addressed word line. A method of operating a digital computer comprising in one operation cycle, addressing a memory, reading each of a row of data from the memory in parallel, and performing an operation function on each bit of the data in parallel to provide a result.

Memory device with multiple processors having parallel access to the

A random access memory chip is comprised of static random access storage elements, word lines, and bit lines connected to the storage elements, a sense amplifier connected to each of the bit lines, a separate processor element connected to each of the sense amplifiers, apparatus for addressing a word line, and apparatus for applying a single instruction to the processor elements, whereby the instructed processor elements are enabled to carry out a processing instruction in parallel on separate bits stored in the storage elements of the addressed word line. A method of operating a digital computer is comprised of in one operation cycle, addressing a memory, reading each of a row of data from the memory in parallel, and performing a same operation function on each bit of the data in parallel to provide a result.

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Toronto, Canada

W Martin Snelgrove