Allegro Microsystems, LLC

Vyankatesh Gupta

Sundar Chetlur

Harianto Wong

James McClay

Gerardo A Monreal

Octavio H Alpago

Nicolas Rigoni

Nicolás Rafael Biberidis

Muhammed Sarwar

Muhammad Sarwar

A method comprising: performing a first read from an address in a data storage module by using a first read voltage; storing, in a first register, data that is retrieved from the data storage module as a result of the first read; performing a second read from the address by using a second read voltage; storing, in a second register, data that is retrieved from the data storage module as a result of the second read; detecting whether a weak bit condition is present at the address based on the data that is stored in the first register and the data that is stored in the second register; and correcting the weak bit condition, when the weak bit condition is present at the address.

Method and apparatus for eliminating bit disturbance errors in non-volatile memory devices

A method for use in a memory device including a first memory matrix is provided, the method comprising: receiving a write request that is associated with a first memory cell, the first memory cell being part of the first memory matrix; copying a content of a second memory cell into a register, the second memory cell being part of the first memory matrix; overwriting the second memory cell with the content of the register when the content of the second memory cell is different from the content of the register; and writing, to the first memory cell, at least a portion of data that is associated with the write request.

Method and apparatus for eliminating EEPROM bit-disturb

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Manchester, NH, United States of America

Vyankatesh Gupta