Ampere Computing LLC

Vung Thanh Huynh

Nagi Aboulenein

Massimo Sutera

Sandeep Brahmadathan

Brian Thomas Chase

Kha Minh Huynh

James Edward Casteel

Apparatus and methods for extending functionality of memory controllers in a processor-based device are disclosed herein. In one aspect, a processor-based device provides a memory access intercept circuit that is communicatively coupled to a memory controller and a memory device. The memory access intercept circuit is configured to receive a memory write request that is directed to and received by the memory controller, and generates a write transaction identifier (ID) for the memory write request. The memory access intercept circuit then generates proxy write data containing the write transaction ID, and sends the proxy write data to the memory controller. The memory access intercept circuit subsequently intercepts the actual write data directed to the memory controller, and stores the write data in a write data buffer in association with the write transaction ID.

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Ho Chi Minh, Vietnam

Vung Thanh Huynh