Stmicroelectronics Design and Application S.r.o.

Vlastimil Kote

Patrik Vacula

Milos Vacula

Milan Lzicar

Adam Kubacak

The present disclosure is directed to a plurality of waffle gate parallel transistors having a shared gate on a surface of a semiconductor substrate. The shared gate has connected channels that form a plurality of squares, lines of each of the squares over the perimeter of a respective source or drain region of the plurality of waffle gate parallel transistors. The shared gate includes squares of a first size and shape and a second size and shape. The squares having the first size and shape are each over a respective source region and the squares having the second size and shape are each over a respective drain region. Each of the squares having a first size and shape share at least one side with one of the squares having the second size and shape.

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Bechlin, Czechia

Vlastimil Kote