Siltronic Ag

Vladimir Dutschke

Leszek Mistur

Torsten Olbrich

Alexander Heilmaier

Klaus Roettger

Makoto Tabata

Markus Schnappauf

Semiconductor wafers are polished on both sides between polishing pads of a Shore A hardness of at least 80 and a compressibility of less than 3%, attached to upper and lower polishing plates, the polishing pads attached to the upper and lower polishing plates by bonding the polishing pads to the plates, and positioning an intermediate pad having a compressibility of at least 3% between the two bonded polishing pads as an intermediate layer and then pressing together the two polishing pads with the intermediate pad situated therebetween for a period of time.

Method for polishing a semiconductor wafer on both sides

A method dresses one polishing cloth or two polishing pads simultaneously, in which a polishing cloth has been applied to a polishing plate, with at least one dresser (), which is equipped with at least one dressing element (), this at least one dressing element () being in contact with the at least one polishing cloth () to be dressed, wherein the at least one polishing plate () is rotated with a relative rotational speed and the at least one dresser () is rotated with a relative rotational speed and at least two different combinations of directions of rotation of the two pairs of polishing plates () and pin wheels () are executed during the simultaneous dressing of two polishing pads () or during the dressing of one polishing cloth () of the polishing plate () and of the at least one dresser ().

Method for dressing polishing pads

A method for polishing at least one wafer composed of semiconductor material that has a front side and the rear side includes performing at least one first polishing step including simultaneously polishing both front and rear sides of the at least one wafer at a process temperature between an upper polishing plate and a lower polishing plate. Each of the upper polishing and lower polishing plates is covered with a polishing pad having an inner edge and an outer edge, a hardness of at least 80&#xb0; Shore A, a compressibility of less than 2.5%, and respective upper and lower surfaces that come into contact with the wafer being polished. The upper and lower surfaces form a polishing gap extending from the inner edge to the outer edge. A height of the polishing gap at the inner edge differs linearly from the height of the polishing gap at the outer edge.

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Lengefeld, Germany

Vladimir Dutschke