Analog Devices,inc.

Sonus Networks, Inc.

Vladimir Botchev

Marc M Hoffman

Wassim Matragi

Ahmed Abdelal

Ke Ning

Wei Zhang

Mark Cox

A non-intrusive objective speech quality assessment is performed on a degraded speech signal. The methods are well suited for systems where random and bursty packet losses may occur and/or packet stream regeneration may also occur prior to speech signal quality assessment. In one embodiment received packetized speech is analyzed to determine to an overall final signal quality score. A limited set of trained neural networks, e.g., 5, corresponding to different signal features, each determine a signal feature quality score. A trained joint quality score determination module determines a joint quality score based on the signal feature quality scores. Packet loss is estimated based on received packet header information and/or detected gap durations. The determined joint quality score is adjusted, based on estimated packet loss information obtained from examining the speech signal, network level statistics and/or codec parameters to generate the final quality score.

Methods and apparatus for signal quality analysis

Methods and an apparatus are provided for interpolation of pixels in a pixel array having rows and columns of pixels. The apparatus includes a shift register array to shift pixel values of the pixel array, the shift register array including two or more shift registers; an interpolation filter array interconnected to the shift register array, the interpolation filter array including one or more interpolation filters; and a controller configured to provide pixel values in columns of the pixel array from the shift register array to respective interpolation filters in a first mode and configured to provide pixel values in rows of the pixel array from the shift register array to respective interpolation filters in a second mode. The controller may be configured to supply vertical sub-pixel values from the shift register array to the interpolation filters to generate diagonal sub-pixel values.

Half pixel interpolator for video motion estimation accelerator

A real-valued FFT processor implements Bergland's real-valued FFT and uses unique interstage switching/delay modules to reduce pipeline latency. Modified hybrid floating point arithmetic is also employed to provide maximum SNR. The real-valued FFT processor is particularly suited for a DMT engine and, in a multichannel CO ADSL application, the DMT engine can be multiplexed between the channels to provide an economic, low cost CO solution.

FFT processor suited for a DMT engine for multichannel CO ADSL application

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Nashua, NH, United States of America

Vladimir Botchev