Micron Technology Incorporated

Round Rock Research, LLC

Photobit Corporation

Aptina Imaging Corporation

Vladimir Berezin

Eric R Fossum

Alexander I Krymski

Inna V Patrick

A method of operating a CMOS imager is presented wherein a reset transistor source/drain of a first pixel is biased with a first voltage source, a source follower transistor of a second pixel is biased with the same first voltage source, a reset transistor source/drain of the second pixel is biased with a second voltage source, and the first voltage source is dropped to ground during a reset of the second pixel.

Method of operating a CMOS APS pixel sensor

A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flightA CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that use a common output transistor. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of an output transistor.

CMOS active image sensor with common pixel transistors and binning capability

An active pixel sensor includes mixed analog and digital signal integration on the same substrate. The analog part of the array forms the active pixel sensor, and the digital part of the array does digital integration of the signal.

Active pixel sensor with mixed analog and digital signal integration

A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight.A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that use a common output transistor. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of an output transistor.

Pinned photodiode photodetector with common pixel transistors and binning capability

A new kind of pixel is formed of two floating diffusions of different sizes and different conductivity type. The two floating diffusions have different image characteristics, and hence form a knee-shaped slope.

Multi junction APS with dual simultaneous integration

A lock in pinned photodiode photodetector includes a plurality of output ports which are sequentially enabled. Each time when the output port is enabled is considered to be a different bin of time. A specified pattern is sent, and the output bins are investigated to look for that pattern. The time when the pattern is received indicates the time of flight.A CMOS active pixel image sensor includes a plurality of pinned photodiode photodetectors that share buffer transistors. In one configuration, the charge from two or more pinned photodiodes may be binned together and applied to the gate of a shared buffer transistor.

Pinned photodiode photodetector with common buffer transistor and binning capability

A CMOS image sensor obtains color through the use of two or three superposed layers. Each pixel in the image sensor includes a plurality of superposed photosensitive p-n junctions with individual charge integration regions. The combination of each of the superposed layers provides increased sensitivity and resolution of a single chip color imager.

Superposed multi-junction color APS

A CMOS imager with two adjacent pixel active area regions without the presence of an intervening trench isolation region that typically separates two adjacent pixels and their associated photodiodes is provided. The shared active area region isolates the two adjacent photodiodes and provides good substrate to surface pinned layer contact without the presence of n&#x2212; type dopant ions and due to the presence of p-type dopant ions. As a result, the size of the imager can be reduced and the photodiodes of the two adjacent pixels have increased capacitance.

Pixel design to improve photodiode capacitance and method of forming same

An image sensing device, such as a CMOS Active Pixel Sensor device, including an array of pixels. Each pixel has a photoreceptor, a follower transistor connected to said photoreceptor, a select transistor connected to said follower transistor, and a reset transistor which controls applying a reset level to a pixel that is different than the pixel in which said reset transistor is physically located.

CMOS APS pixel sensor dynamic range increase

An image sensing device, such as a CMOS Active Pixel Sensor device, including an array of pixels. Each pixel has a photoreceptor, a follower transistor connected to the photoreceptor, a select transistor connected to the follower transistor, and a reset transistor. A first bias line provides power to at least a first of the transistors for a first pixel, and a second bias line provides power to at least a second of the transistors of said first pixel different than the first transistor of the first pixel.

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La Crescenta, CA, United States of America

Vladimir Berezin