Stmicroelectronics International N.v.

Vivek Tripathi

Ankur Bal

Rupesh Singh

Pratap Narayan Singh

Rakesh Malik

Anil Kumar

A quad signal generator circuit generates four 2-1 bit control signals in response to a 2-1 bit thermometer coded signal. A digital-to-analog converter (DAC) circuit has 2-1 unit DAC elements, with each unit DAC element including four switching circuits controlled by corresponding bits of the four 2-1 bit control signals. Outputs of the 2-1 unit DAC elements are summed to generate an analog output signal. The quad signal generator circuit controls a time delay applied to clock signals relative to the 2-1 bit thermometer coded signal and a time delay applied to the 2-1 bit thermometer coded signal relative to the delayed clock signals in logically generating the four 2-1 bit control signals. The analog output signal may be a feedback signal in a sigma-delta analog-to-digital converter (ADC) circuit that includes a multi-bit quantization circuit operating to quantize a filtered loop signal to generate the 2-1 bit thermometer coded signal.

Double data rate (DDR) quad switched multibit digital to analog converter and continuous time sigma-delta modulator

A quantizer generates a thermometer coded signal from an analog voltage signal. Data weighted averaging (DWA) of the thermometer coded signal is accomplished by controlling the operation of a crossbar switch controlled by a switch control signal to generate an output DWA signal. The output DWA signal is latched to generate a latched output DWA signal which is processed along with bits of the thermometer coded input signal in feedback loop to generate the switch control signal. The latching of the output DWA signal is performed in an input register of a digital-to-analog converter which operates to convert the latched output DWA signal to a feedback analog voltage from which the analog voltage signal is generated. The switch control signal specifies a bit location for a beginning logic transition of the output DWA signal cycle based on detection of an ending logic transition of the latched DWA signal.

First order memory-less dynamic element matching technique

A quad signal generator circuit generates four 2&#x2212;1 bit control signals in response to a sampling clock and a 2&#x2212;1 bit thermometer coded signal. A digital-to-analog converter (DAC) circuit has 2&#x2212;1 unit resistor elements, with each unit resistor element including four switching circuits controlled by corresponding bits of the four 2&#x2212;1 bit control signals. Outputs of the 2&#x2212;1 unit resistor elements are summed to generate an analog output signal. The quad signal generator circuit controls generation of the four 2&#x2212;1 bit control signals such that all logic states of bits of the four 2&#x2212;1 bit control signals remain constant for at least a duration of one cycle of the sampling clock. The analog output signal may be a feedback signal in a sigma-delta analog-to-digital converter (ADC) circuit that includes a multi-bit quantization circuit operating to quantize a filtered loop signal to generate the 2&#x2212;1 bit thermometer coded signal.

Quad switched multibit digital to analog converter and continuous time sigma-delta modulator

Disclosed herein is a digital to analog converter including a first dynamic latch receiving a data signal and an inverse of the data signal. The first dynamic latch is clocked by a clock signal and configured to generate first and second quad switching control signals as a function of the data signal and the inverse of the data signal. A second dynamic latch receives the data signal and the inverse of the data signal, is clocked by an inverse of the clock signal, and is configured to generate third and fourth quad switching control signals as a function of the data signal and the inverse of the data signal. A quad switching bit cell is configured to generate an analog representation of the data signal as a function of the first, second, third, and fourth quad switching signals.

Growing community of inventors

Allahabad, India

Vivek Tripathi