Intel Corporation

Vivek Thakkar

Ravi L Sahita

Rajesh Banginwar

Sumanth Naropanth

Sunil K Notalapati Prabhakara

Surendra K Singh

Arvind Mohan

Rahil Malhotra

Aman Bakshi

Vasudevarao Kamma

Jyothi Nayak

Royston A Pinto

Koichi Yamada

Matthew C Merten

Paul Caprioli

Abhay Kanhere

Suresh Srinivas

Omar M Shaikh

Muawya M Al-Otoom

Pawel Osciak

Abhay S Kanhere

Rajesh P Banginwar

A data processing system (DPS) uses platform protection technology (PPT) to protect some or all of the code and data belonging to certain software modules. The PPT may include a virtual machine monitor (VMM) to enable an untrusted application and a trusted application to run on top of a single operating system (OS), while preventing the untrusted application from accessing memory used by the trusted application. The VMM may use a first extended page table (EPT) to translate a guest physical address (GPA) into a first host physical address (HPA) for the untrusted application. The VMM may use a second EPT to translate the GPA into a second HPA for the trusted application. The first and second EPTs may map the same GPA to different HPAs. Other embodiments are described and claimed.

Virtualization-based platform protection technology

A hardware profiling mechanism implemented by performance monitoring hardware enables page level automatic binary translation. The hardware during runtime identifies a code page in memory containing potentially optimizable instructions. The hardware requests allocation of a new page in memory associated with the code page, where the new page contains a collection of counters and each of the counters corresponds to one of the instructions in the code page. When the hardware detects a branch instruction having a branch target within the code page, it increments one of the counters that has the same position in the new page as the branch target in the code page. The execution of the code page is repeated and the counters are incremented when branch targets fall within the code page. The hardware then provides the counter values in the new page to a binary translator for binary translation.

Hardware profiling mechanism to enable page level automatic binary translation

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Bengaluru, India

Vivek Thakkar