Microsoft Technology Licensing, LLC

Vivek Seshadri

Trishul A Chilimbi

Amar Phanishayee

Nikhil Devanur Rangarajan

Olatunji Ruwase

Deepak Narayanan

Efficient instruction processing for sparse data includes extensions to a processor pipeline to identify zero-optimizable instructions that include at least one zero input operand, and bypass the execute stage of the processor pipeline, determining the result of the operation without executing the instruction. When possible, the extensions also bypass the writeback stage of the processor pipeline.

Efficient instruction processing for sparse data

Loop code processor optimizations are implemented as a loop optimizer extension to a processor pipeline. The loop optimizer generates optimized code associated with code loops that include at least one zero-optimizable instruction. The loop optimizer may generate multiple versions of optimized code associated with a particular code loop, where each of the multiple version of optimized code has a different associated condition under which the optimized code can be safely executed.

Growing community of inventors

Pittsburgh, PA, United States of America

Vivek Seshadri