Stmicroelectronics S.r.l.

Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno

Vito Raineri

Mario Giuseppe Saggio

Salvatore Coffa

Cesare Ronsisvalle

Anna Battaglia

Umberto Stagnitti

Piergiorgio Fallica

Salvatore Ugo Campisano

Sebastiano Mugavero

Davide Caruso

A method for forming isolating structures in a silicon carbide layer includes depositing a masking layer on first and second portions of the silicon carbide layer, and forming openings through the masking layer to expose the first portions of the silicon carbide layer. Ions are implanted into the first portions of the silicon carbide layer. The silicon carbide layer is heated to form an oxide layer thereon having first portions on the first portions of the silicon carbide layer, and having second portions on the second portions of the silicon carbide layer. The first portions of the oxide layer are etched to form isolating regions in the silicon carbide layer.

Method for manufacturing isolating structures

A method of fabricating electronic devices, integrated monolithically in a semiconductor substrate having at least one non-active area contiguous with at least one device active area, which method comprises at least one step of implanting ions of a noble gas, followed by a thermal treatment to form getter microcavities in the semiconductor by evaporation of the noble gas, wherein the implanting step is carried out in the non-active area of the semiconductor.

Method of fabricating electronic devices integrated in semiconductor substrates provided with gettering sites, and a device fabricated by the method

This invention relates to a method for manufacturing electronic devices integrated monolithically in a semiconductor substrate delimited by two opposed front and back surfaces of a semiconductor material wafer. The method comprises at least a step of implanting ions of a noble gas, followed by a thermal treatment directed to form gettering microvoids in the semiconductor by evaporation of the gas. The ion implanting step is carried out through the back surface of the semiconductor wafer prior to starting the manufacturing process for the electronic devices, and also can be before the step of cleaning the front surface of the wafer.

Method for manufacturing electronic devices in semiconductor substrates provided with gettering sites

A method and apparatus for the localized reduction of the lifetime of charge carriers in integrated electronic devices. The method comprises the step of implanting ions, at a high dosage and at a high energy level, of a noble gas, preferably helium, in the active regions of the integrated device so that the ions form bubbles in the active regions. A further thermal treatment is performed after the formation of bubbles of the noble gas in order to improve the structure of the bubbles and to make the noble gas evaporate, leaving cavities in the active regions.

Method and apparatus for the localized reduction of the lifetime of charge carriers, particularly in integrated electronic devices

Apparatus for the localized reduction of the lifetime of charge

A method and apparatus for forming buried oxide layers within silicon wafers comprising several steps. Recesses are formed in a silicon wafer. Light ions are implanted in the silicon wafer at a depth that is smaller than the depth of the recesses to form bubbles of the light ions in the silicon wafer. The light ions are evaporated from the silicon wafer to leave cavities in the place of the bubbles. The cavities are oxidized through the recesses to form a buried layer of silicon oxide.

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Mascalucia, Italy

Vito Raineri