Sgs-thomson Microelectronics S.r.l.

Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno

Co.ri.m.me-consorzio Per La Ricerca Sulla Microelectronica Nel

Vito Graziano

Natale Aiello

Sergio Palara

Atanasio La Barbera

Stefano Sueri

An integrated device comprises a high-voltage transistor and a low-voltage transistor in an emitter-switching configuration integrated in a chip (400) of semiconductor material comprising a buried P-type region (120) and a corresponding P-type contact region (405) which delimit a portion of semiconductor material within which the low-voltage transistor is formed. The contact region (405) has a network structure such as to divide this portion of semiconductor material into a plurality of cells (410) within each of which there is an elemental P-type base region (425) and an elemental N-type emitter region (430) of the low-voltage transistor. The elemental regions (425) and (430) of the various cells (410) are electrically connected to one another by means of surface metal contacts.

Integrated device in an emitter switching configuration and with a

The present invention relates to an integrated circuit adapted to perform the function of a diode of the DIAC type, the circuit having an input terminal and an output terminal. The circuit includes a first input transistor having a first terminal connected to a fixed voltage reference, a second terminal, and a control terminal coupled to the input terminal of the circuit. The circuit further includes second and third transistors in a current mirror configuration, each having a first terminal for coupling to the input terminal of the circuit, and a second terminal, and associated control terminals connected together and coupled to the second terminal of the first input transistor, the second terminal of the second transistor being connected to the control terminal of the first transistor. Finally, the circuit includes a fourth output transistor connected, with first and second terminals, between the output terminal and the input terminal of the circuit, the fourth output transistor also having a control terminal connected to the second terminal of the third transistor.

IC for implementing the function of a DIAC diode

A driver circuit delays the turning on of a MOS transistor by utilizing the time-wise pattern of the circuit input signal rather than generating a delay within the circuit itself. A threshold type of circuit element is arranged so that no current flows toward or from, depending on the type of the MOS transistor, the control terminal before the voltage at the circuit input exceeds a predetermined value. This is achieved, for example, by coupling a Zener diode serially to the control terminal. Where the input signal is of a kind which increases with a degree of uniformity, the time required to exceed that threshold will correspond to the desired delay. Thus, the driver circuit can match the dynamic range of the input signal automatically.

Driving circuit and method for driving a MOS transistor with delayed

A method and device for maintaining junction isolation between a second region that is normally clamped at a reference potential, contained within a first region of an opposite type of conductivity whose potential is subject to large inertial swings. The junction is ensured even when the potential of the first region moves toward and beyond the reference potential to which the second region is clamped, by connecting the second region to the reference potential by a switch, and causing the switch to open which places the second region in a floating state, leaving it free to track the potential excursion of the first region. The switch is closed after the potential of the first region has returned to a normal value. A comparator senses a shift of the potential of the second region from the reference potential to which it is clamped. The shift is dynamically induced by the capacitive coupling of the two regions, and triggers off the clamping switch.

Method and device for dynamically self-biasing regions of integrated

The present invention relates to an electronic device integrated monolithlly on a semiconductor material comprising a substrate having a first conductivity type in which are formed first and second diffusion regions of a second conductivity type. The substrate and the first and second diffusion regions defining a base region, a collector region and an emitter region of a parasitic transistor. The second diffusion region includes a third diffusion region having conductivity of the first type to provide in the second diffusion region a resistive path placed in series with the emitter region of the parasitic transistor while backfeeding it negatively and taking it to saturation with a resulting reduction of its current gain and limitation of the maximum current due thereto.

Integrated electronic device with reduced parasitic currents, and

A start up circuit causes a MOS transistor to be turned on by sensing local electrical quantities thereof, specifically the potential at the drain terminal of the MOS transistor. A small current is injected into the control terminal of the MOS transistor when the potential at the drain terminal is high. For the purpose, an electric network is arranged to couple these two terminals together.

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Palermo, Italy

Vito Graziano