Juniper Networks, Inc.

Visweh Ananthakrishnan

Dennis C Ferguson

Philippe Lacroute

Gerald Cheung

Pankaj Patel

Tatao Chuang

Chi-Chung Kenny Chen

Ordering logic ensures that data items being processed by a number of parallel processing units are unloaded from the processing units in the original per-flow order that the data items were loaded into the parallel processing units. The ordering logic includes a pointer memory, a tail vector, and a head vector. Through these three elements, the ordering logic keeps track of a number of 'virtual queues' corresponding to the data flows. A round robin arbiter unloads data items from the processing units only when a data item is at the head of its virtual queue.

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Sunnyvale, CA, United States of America

Visweh Ananthakrishnan