Texas Instruments Corporation

Vishwanath Joshi

Ann Margaret Concannon

Aravind Chennimalai Appaswamy

Antonio Gallerano

Krishna Praveen Mysore Rajagopal

Mariano Dissegna

Yanqing Li

Zhao Gao

Rajiv Damodaran Prabha

A device includes a protected terminal, a reference terminal, and a rate-triggered circuit coupled to the protected terminal and to the reference terminal. The rate-triggered circuit is configured to provide an output voltage responsive to a ramp rate of a voltage at the protected terminal being greater than a rate threshold. The device also includes a transistor configured to shunt current from the protected terminal to the reference terminal responsive to the rate-triggered circuit output voltage, and a level-sensing circuit configured to turn off the transistor responsive to the voltage at the protected terminal being greater than a level-sense threshold.

Level sensing shut-off for a rate-triggered electrostatic discharge protection circuit

A protection circuit for a signal processor, a method of operating the protection circuit, and a method of forming the protection circuit. In one example, the protection circuit is couplable to a signal port and a first power bus for the signal processor. The protection circuit includes a first diode string couplable across the signal port and the first power bus. The first diode string includes a first diode and a second diode coupled in series in a same polarity sense. The protection circuit also includes a third diode coupled in parallel with one of the first diode and the second diode in an opposite polarity sense.

Protection circuit for signal processor

Disclosed examples include an ESD protection circuit, including a transistor operative according to a control voltage signal at a control node to selectively conduct current from a protected node to a reference node during an ESD event, as well as a resistor connected between the control node and the reference node, a capacitor connected between the control node and an internal node, and a diode with an anode connected to the protected node and a cathode connected to the internal node to allow charging current to flow from the protected node to charge the capacitor and to provide a high impedance to the internal node to prevent or mitigate flow of leakage current from the internal node to the protected node to raise a trigger voltage of the protection circuit during normal operation.

ESD protection circuit with passive trigger voltage controlled shut-off

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Richardson, TX, United States of America

Vishwanath Joshi